tlb.c 3.1 KB

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  1. /*
  2. * arch/xtensa/mm/tlb.c
  3. *
  4. * Logic that manipulates the Xtensa MMU. Derived from MIPS.
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (C) 2001 - 2003 Tensilica Inc.
  11. *
  12. * Joe Taylor
  13. * Chris Zankel <chris@zankel.net>
  14. * Marc Gauthier
  15. */
  16. #include <linux/mm.h>
  17. #include <asm/processor.h>
  18. #include <asm/mmu_context.h>
  19. #include <asm/tlbflush.h>
  20. #include <asm/cacheflush.h>
  21. static inline void __flush_itlb_all (void)
  22. {
  23. int w, i;
  24. for (w = 0; w < ITLB_ARF_WAYS; w++) {
  25. for (i = 0; i < (1 << XCHAL_ITLB_ARF_ENTRIES_LOG2); i++) {
  26. int e = w + (i << PAGE_SHIFT);
  27. invalidate_itlb_entry_no_isync(e);
  28. }
  29. }
  30. asm volatile ("isync\n");
  31. }
  32. static inline void __flush_dtlb_all (void)
  33. {
  34. int w, i;
  35. for (w = 0; w < DTLB_ARF_WAYS; w++) {
  36. for (i = 0; i < (1 << XCHAL_DTLB_ARF_ENTRIES_LOG2); i++) {
  37. int e = w + (i << PAGE_SHIFT);
  38. invalidate_dtlb_entry_no_isync(e);
  39. }
  40. }
  41. asm volatile ("isync\n");
  42. }
  43. void flush_tlb_all (void)
  44. {
  45. __flush_itlb_all();
  46. __flush_dtlb_all();
  47. }
  48. /* If mm is current, we simply assign the current task a new ASID, thus,
  49. * invalidating all previous tlb entries. If mm is someone else's user mapping,
  50. * wie invalidate the context, thus, when that user mapping is swapped in,
  51. * a new context will be assigned to it.
  52. */
  53. void flush_tlb_mm(struct mm_struct *mm)
  54. {
  55. if (mm == current->active_mm) {
  56. int flags;
  57. local_save_flags(flags);
  58. __get_new_mmu_context(mm);
  59. __load_mmu_context(mm);
  60. local_irq_restore(flags);
  61. }
  62. else
  63. mm->context = 0;
  64. }
  65. #define _ITLB_ENTRIES (ITLB_ARF_WAYS << XCHAL_ITLB_ARF_ENTRIES_LOG2)
  66. #define _DTLB_ENTRIES (DTLB_ARF_WAYS << XCHAL_DTLB_ARF_ENTRIES_LOG2)
  67. #if _ITLB_ENTRIES > _DTLB_ENTRIES
  68. # define _TLB_ENTRIES _ITLB_ENTRIES
  69. #else
  70. # define _TLB_ENTRIES _DTLB_ENTRIES
  71. #endif
  72. void flush_tlb_range (struct vm_area_struct *vma,
  73. unsigned long start, unsigned long end)
  74. {
  75. struct mm_struct *mm = vma->vm_mm;
  76. unsigned long flags;
  77. if (mm->context == NO_CONTEXT)
  78. return;
  79. #if 0
  80. printk("[tlbrange<%02lx,%08lx,%08lx>]\n",
  81. (unsigned long)mm->context, start, end);
  82. #endif
  83. local_save_flags(flags);
  84. if (end-start + (PAGE_SIZE-1) <= _TLB_ENTRIES << PAGE_SHIFT) {
  85. int oldpid = get_rasid_register();
  86. set_rasid_register (ASID_INSERT(mm->context));
  87. start &= PAGE_MASK;
  88. if (vma->vm_flags & VM_EXEC)
  89. while(start < end) {
  90. invalidate_itlb_mapping(start);
  91. invalidate_dtlb_mapping(start);
  92. start += PAGE_SIZE;
  93. }
  94. else
  95. while(start < end) {
  96. invalidate_dtlb_mapping(start);
  97. start += PAGE_SIZE;
  98. }
  99. set_rasid_register(oldpid);
  100. } else {
  101. flush_tlb_mm(mm);
  102. }
  103. local_irq_restore(flags);
  104. }
  105. void flush_tlb_page (struct vm_area_struct *vma, unsigned long page)
  106. {
  107. struct mm_struct* mm = vma->vm_mm;
  108. unsigned long flags;
  109. int oldpid;
  110. if(mm->context == NO_CONTEXT)
  111. return;
  112. local_save_flags(flags);
  113. oldpid = get_rasid_register();
  114. if (vma->vm_flags & VM_EXEC)
  115. invalidate_itlb_mapping(page);
  116. invalidate_dtlb_mapping(page);
  117. set_rasid_register(oldpid);
  118. local_irq_restore(flags);
  119. }