insn.c 14 KB

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  1. /*
  2. * x86 instruction analysis
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. *
  18. * Copyright (C) IBM Corporation, 2002, 2004, 2009
  19. */
  20. #include <linux/string.h>
  21. #include <asm/inat.h>
  22. #include <asm/insn.h>
  23. /* Verify next sizeof(t) bytes can be on the same instruction */
  24. #define validate_next(t, insn, n) \
  25. ((insn)->next_byte + sizeof(t) + n - (insn)->kaddr <= MAX_INSN_SIZE)
  26. #define __get_next(t, insn) \
  27. ({ t r = *(t*)insn->next_byte; insn->next_byte += sizeof(t); r; })
  28. #define __peek_nbyte_next(t, insn, n) \
  29. ({ t r = *(t*)((insn)->next_byte + n); r; })
  30. #define get_next(t, insn) \
  31. ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); })
  32. #define peek_nbyte_next(t, insn, n) \
  33. ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); })
  34. #define peek_next(t, insn) peek_nbyte_next(t, insn, 0)
  35. /**
  36. * insn_init() - initialize struct insn
  37. * @insn: &struct insn to be initialized
  38. * @kaddr: address (in kernel memory) of instruction (or copy thereof)
  39. * @x86_64: !0 for 64-bit kernel or 64-bit app
  40. */
  41. void insn_init(struct insn *insn, const void *kaddr, int x86_64)
  42. {
  43. memset(insn, 0, sizeof(*insn));
  44. insn->kaddr = kaddr;
  45. insn->next_byte = kaddr;
  46. insn->x86_64 = x86_64 ? 1 : 0;
  47. insn->opnd_bytes = 4;
  48. if (x86_64)
  49. insn->addr_bytes = 8;
  50. else
  51. insn->addr_bytes = 4;
  52. }
  53. /**
  54. * insn_get_prefixes - scan x86 instruction prefix bytes
  55. * @insn: &struct insn containing instruction
  56. *
  57. * Populates the @insn->prefixes bitmap, and updates @insn->next_byte
  58. * to point to the (first) opcode. No effect if @insn->prefixes.got
  59. * is already set.
  60. */
  61. void insn_get_prefixes(struct insn *insn)
  62. {
  63. struct insn_field *prefixes = &insn->prefixes;
  64. insn_attr_t attr;
  65. insn_byte_t b, lb;
  66. int i, nb;
  67. if (prefixes->got)
  68. return;
  69. nb = 0;
  70. lb = 0;
  71. b = peek_next(insn_byte_t, insn);
  72. attr = inat_get_opcode_attribute(b);
  73. while (inat_is_legacy_prefix(attr)) {
  74. /* Skip if same prefix */
  75. for (i = 0; i < nb; i++)
  76. if (prefixes->bytes[i] == b)
  77. goto found;
  78. if (nb == 4)
  79. /* Invalid instruction */
  80. break;
  81. prefixes->bytes[nb++] = b;
  82. if (inat_is_address_size_prefix(attr)) {
  83. /* address size switches 2/4 or 4/8 */
  84. if (insn->x86_64)
  85. insn->addr_bytes ^= 12;
  86. else
  87. insn->addr_bytes ^= 6;
  88. } else if (inat_is_operand_size_prefix(attr)) {
  89. /* oprand size switches 2/4 */
  90. insn->opnd_bytes ^= 6;
  91. }
  92. found:
  93. prefixes->nbytes++;
  94. insn->next_byte++;
  95. lb = b;
  96. b = peek_next(insn_byte_t, insn);
  97. attr = inat_get_opcode_attribute(b);
  98. }
  99. /* Set the last prefix */
  100. if (lb && lb != insn->prefixes.bytes[3]) {
  101. if (unlikely(insn->prefixes.bytes[3])) {
  102. /* Swap the last prefix */
  103. b = insn->prefixes.bytes[3];
  104. for (i = 0; i < nb; i++)
  105. if (prefixes->bytes[i] == lb)
  106. prefixes->bytes[i] = b;
  107. }
  108. insn->prefixes.bytes[3] = lb;
  109. }
  110. /* Decode REX prefix */
  111. if (insn->x86_64) {
  112. b = peek_next(insn_byte_t, insn);
  113. attr = inat_get_opcode_attribute(b);
  114. if (inat_is_rex_prefix(attr)) {
  115. insn->rex_prefix.value = b;
  116. insn->rex_prefix.nbytes = 1;
  117. insn->next_byte++;
  118. if (X86_REX_W(b))
  119. /* REX.W overrides opnd_size */
  120. insn->opnd_bytes = 8;
  121. }
  122. }
  123. insn->rex_prefix.got = 1;
  124. /* Decode VEX prefix */
  125. b = peek_next(insn_byte_t, insn);
  126. attr = inat_get_opcode_attribute(b);
  127. if (inat_is_vex_prefix(attr)) {
  128. insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1);
  129. if (!insn->x86_64) {
  130. /*
  131. * In 32-bits mode, if the [7:6] bits (mod bits of
  132. * ModRM) on the second byte are not 11b, it is
  133. * LDS or LES.
  134. */
  135. if (X86_MODRM_MOD(b2) != 3)
  136. goto vex_end;
  137. }
  138. insn->vex_prefix.bytes[0] = b;
  139. insn->vex_prefix.bytes[1] = b2;
  140. if (inat_is_vex3_prefix(attr)) {
  141. b2 = peek_nbyte_next(insn_byte_t, insn, 2);
  142. insn->vex_prefix.bytes[2] = b2;
  143. insn->vex_prefix.nbytes = 3;
  144. insn->next_byte += 3;
  145. if (insn->x86_64 && X86_VEX_W(b2))
  146. /* VEX.W overrides opnd_size */
  147. insn->opnd_bytes = 8;
  148. } else {
  149. insn->vex_prefix.nbytes = 2;
  150. insn->next_byte += 2;
  151. }
  152. }
  153. vex_end:
  154. insn->vex_prefix.got = 1;
  155. prefixes->got = 1;
  156. err_out:
  157. return;
  158. }
  159. /**
  160. * insn_get_opcode - collect opcode(s)
  161. * @insn: &struct insn containing instruction
  162. *
  163. * Populates @insn->opcode, updates @insn->next_byte to point past the
  164. * opcode byte(s), and set @insn->attr (except for groups).
  165. * If necessary, first collects any preceding (prefix) bytes.
  166. * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got
  167. * is already 1.
  168. */
  169. void insn_get_opcode(struct insn *insn)
  170. {
  171. struct insn_field *opcode = &insn->opcode;
  172. insn_byte_t op;
  173. int pfx_id;
  174. if (opcode->got)
  175. return;
  176. if (!insn->prefixes.got)
  177. insn_get_prefixes(insn);
  178. /* Get first opcode */
  179. op = get_next(insn_byte_t, insn);
  180. opcode->bytes[0] = op;
  181. opcode->nbytes = 1;
  182. /* Check if there is VEX prefix or not */
  183. if (insn_is_avx(insn)) {
  184. insn_byte_t m, p;
  185. m = insn_vex_m_bits(insn);
  186. p = insn_vex_p_bits(insn);
  187. insn->attr = inat_get_avx_attribute(op, m, p);
  188. if (!inat_accept_vex(insn->attr) && !inat_is_group(insn->attr))
  189. insn->attr = 0; /* This instruction is bad */
  190. goto end; /* VEX has only 1 byte for opcode */
  191. }
  192. insn->attr = inat_get_opcode_attribute(op);
  193. while (inat_is_escape(insn->attr)) {
  194. /* Get escaped opcode */
  195. op = get_next(insn_byte_t, insn);
  196. opcode->bytes[opcode->nbytes++] = op;
  197. pfx_id = insn_last_prefix_id(insn);
  198. insn->attr = inat_get_escape_attribute(op, pfx_id, insn->attr);
  199. }
  200. if (inat_must_vex(insn->attr))
  201. insn->attr = 0; /* This instruction is bad */
  202. end:
  203. opcode->got = 1;
  204. err_out:
  205. return;
  206. }
  207. /**
  208. * insn_get_modrm - collect ModRM byte, if any
  209. * @insn: &struct insn containing instruction
  210. *
  211. * Populates @insn->modrm and updates @insn->next_byte to point past the
  212. * ModRM byte, if any. If necessary, first collects the preceding bytes
  213. * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1.
  214. */
  215. void insn_get_modrm(struct insn *insn)
  216. {
  217. struct insn_field *modrm = &insn->modrm;
  218. insn_byte_t pfx_id, mod;
  219. if (modrm->got)
  220. return;
  221. if (!insn->opcode.got)
  222. insn_get_opcode(insn);
  223. if (inat_has_modrm(insn->attr)) {
  224. mod = get_next(insn_byte_t, insn);
  225. modrm->value = mod;
  226. modrm->nbytes = 1;
  227. if (inat_is_group(insn->attr)) {
  228. pfx_id = insn_last_prefix_id(insn);
  229. insn->attr = inat_get_group_attribute(mod, pfx_id,
  230. insn->attr);
  231. if (insn_is_avx(insn) && !inat_accept_vex(insn->attr))
  232. insn->attr = 0; /* This is bad */
  233. }
  234. }
  235. if (insn->x86_64 && inat_is_force64(insn->attr))
  236. insn->opnd_bytes = 8;
  237. modrm->got = 1;
  238. err_out:
  239. return;
  240. }
  241. /**
  242. * insn_rip_relative() - Does instruction use RIP-relative addressing mode?
  243. * @insn: &struct insn containing instruction
  244. *
  245. * If necessary, first collects the instruction up to and including the
  246. * ModRM byte. No effect if @insn->x86_64 is 0.
  247. */
  248. int insn_rip_relative(struct insn *insn)
  249. {
  250. struct insn_field *modrm = &insn->modrm;
  251. if (!insn->x86_64)
  252. return 0;
  253. if (!modrm->got)
  254. insn_get_modrm(insn);
  255. /*
  256. * For rip-relative instructions, the mod field (top 2 bits)
  257. * is zero and the r/m field (bottom 3 bits) is 0x5.
  258. */
  259. return (modrm->nbytes && (modrm->value & 0xc7) == 0x5);
  260. }
  261. /**
  262. * insn_get_sib() - Get the SIB byte of instruction
  263. * @insn: &struct insn containing instruction
  264. *
  265. * If necessary, first collects the instruction up to and including the
  266. * ModRM byte.
  267. */
  268. void insn_get_sib(struct insn *insn)
  269. {
  270. insn_byte_t modrm;
  271. if (insn->sib.got)
  272. return;
  273. if (!insn->modrm.got)
  274. insn_get_modrm(insn);
  275. if (insn->modrm.nbytes) {
  276. modrm = (insn_byte_t)insn->modrm.value;
  277. if (insn->addr_bytes != 2 &&
  278. X86_MODRM_MOD(modrm) != 3 && X86_MODRM_RM(modrm) == 4) {
  279. insn->sib.value = get_next(insn_byte_t, insn);
  280. insn->sib.nbytes = 1;
  281. }
  282. }
  283. insn->sib.got = 1;
  284. err_out:
  285. return;
  286. }
  287. /**
  288. * insn_get_displacement() - Get the displacement of instruction
  289. * @insn: &struct insn containing instruction
  290. *
  291. * If necessary, first collects the instruction up to and including the
  292. * SIB byte.
  293. * Displacement value is sign-expanded.
  294. */
  295. void insn_get_displacement(struct insn *insn)
  296. {
  297. insn_byte_t mod, rm, base;
  298. if (insn->displacement.got)
  299. return;
  300. if (!insn->sib.got)
  301. insn_get_sib(insn);
  302. if (insn->modrm.nbytes) {
  303. /*
  304. * Interpreting the modrm byte:
  305. * mod = 00 - no displacement fields (exceptions below)
  306. * mod = 01 - 1-byte displacement field
  307. * mod = 10 - displacement field is 4 bytes, or 2 bytes if
  308. * address size = 2 (0x67 prefix in 32-bit mode)
  309. * mod = 11 - no memory operand
  310. *
  311. * If address size = 2...
  312. * mod = 00, r/m = 110 - displacement field is 2 bytes
  313. *
  314. * If address size != 2...
  315. * mod != 11, r/m = 100 - SIB byte exists
  316. * mod = 00, SIB base = 101 - displacement field is 4 bytes
  317. * mod = 00, r/m = 101 - rip-relative addressing, displacement
  318. * field is 4 bytes
  319. */
  320. mod = X86_MODRM_MOD(insn->modrm.value);
  321. rm = X86_MODRM_RM(insn->modrm.value);
  322. base = X86_SIB_BASE(insn->sib.value);
  323. if (mod == 3)
  324. goto out;
  325. if (mod == 1) {
  326. insn->displacement.value = get_next(char, insn);
  327. insn->displacement.nbytes = 1;
  328. } else if (insn->addr_bytes == 2) {
  329. if ((mod == 0 && rm == 6) || mod == 2) {
  330. insn->displacement.value =
  331. get_next(short, insn);
  332. insn->displacement.nbytes = 2;
  333. }
  334. } else {
  335. if ((mod == 0 && rm == 5) || mod == 2 ||
  336. (mod == 0 && base == 5)) {
  337. insn->displacement.value = get_next(int, insn);
  338. insn->displacement.nbytes = 4;
  339. }
  340. }
  341. }
  342. out:
  343. insn->displacement.got = 1;
  344. err_out:
  345. return;
  346. }
  347. /* Decode moffset16/32/64. Return 0 if failed */
  348. static int __get_moffset(struct insn *insn)
  349. {
  350. switch (insn->addr_bytes) {
  351. case 2:
  352. insn->moffset1.value = get_next(short, insn);
  353. insn->moffset1.nbytes = 2;
  354. break;
  355. case 4:
  356. insn->moffset1.value = get_next(int, insn);
  357. insn->moffset1.nbytes = 4;
  358. break;
  359. case 8:
  360. insn->moffset1.value = get_next(int, insn);
  361. insn->moffset1.nbytes = 4;
  362. insn->moffset2.value = get_next(int, insn);
  363. insn->moffset2.nbytes = 4;
  364. break;
  365. default: /* opnd_bytes must be modified manually */
  366. goto err_out;
  367. }
  368. insn->moffset1.got = insn->moffset2.got = 1;
  369. return 1;
  370. err_out:
  371. return 0;
  372. }
  373. /* Decode imm v32(Iz). Return 0 if failed */
  374. static int __get_immv32(struct insn *insn)
  375. {
  376. switch (insn->opnd_bytes) {
  377. case 2:
  378. insn->immediate.value = get_next(short, insn);
  379. insn->immediate.nbytes = 2;
  380. break;
  381. case 4:
  382. case 8:
  383. insn->immediate.value = get_next(int, insn);
  384. insn->immediate.nbytes = 4;
  385. break;
  386. default: /* opnd_bytes must be modified manually */
  387. goto err_out;
  388. }
  389. return 1;
  390. err_out:
  391. return 0;
  392. }
  393. /* Decode imm v64(Iv/Ov), Return 0 if failed */
  394. static int __get_immv(struct insn *insn)
  395. {
  396. switch (insn->opnd_bytes) {
  397. case 2:
  398. insn->immediate1.value = get_next(short, insn);
  399. insn->immediate1.nbytes = 2;
  400. break;
  401. case 4:
  402. insn->immediate1.value = get_next(int, insn);
  403. insn->immediate1.nbytes = 4;
  404. break;
  405. case 8:
  406. insn->immediate1.value = get_next(int, insn);
  407. insn->immediate1.nbytes = 4;
  408. insn->immediate2.value = get_next(int, insn);
  409. insn->immediate2.nbytes = 4;
  410. break;
  411. default: /* opnd_bytes must be modified manually */
  412. goto err_out;
  413. }
  414. insn->immediate1.got = insn->immediate2.got = 1;
  415. return 1;
  416. err_out:
  417. return 0;
  418. }
  419. /* Decode ptr16:16/32(Ap) */
  420. static int __get_immptr(struct insn *insn)
  421. {
  422. switch (insn->opnd_bytes) {
  423. case 2:
  424. insn->immediate1.value = get_next(short, insn);
  425. insn->immediate1.nbytes = 2;
  426. break;
  427. case 4:
  428. insn->immediate1.value = get_next(int, insn);
  429. insn->immediate1.nbytes = 4;
  430. break;
  431. case 8:
  432. /* ptr16:64 is not exist (no segment) */
  433. return 0;
  434. default: /* opnd_bytes must be modified manually */
  435. goto err_out;
  436. }
  437. insn->immediate2.value = get_next(unsigned short, insn);
  438. insn->immediate2.nbytes = 2;
  439. insn->immediate1.got = insn->immediate2.got = 1;
  440. return 1;
  441. err_out:
  442. return 0;
  443. }
  444. /**
  445. * insn_get_immediate() - Get the immediates of instruction
  446. * @insn: &struct insn containing instruction
  447. *
  448. * If necessary, first collects the instruction up to and including the
  449. * displacement bytes.
  450. * Basically, most of immediates are sign-expanded. Unsigned-value can be
  451. * get by bit masking with ((1 << (nbytes * 8)) - 1)
  452. */
  453. void insn_get_immediate(struct insn *insn)
  454. {
  455. if (insn->immediate.got)
  456. return;
  457. if (!insn->displacement.got)
  458. insn_get_displacement(insn);
  459. if (inat_has_moffset(insn->attr)) {
  460. if (!__get_moffset(insn))
  461. goto err_out;
  462. goto done;
  463. }
  464. if (!inat_has_immediate(insn->attr))
  465. /* no immediates */
  466. goto done;
  467. switch (inat_immediate_size(insn->attr)) {
  468. case INAT_IMM_BYTE:
  469. insn->immediate.value = get_next(char, insn);
  470. insn->immediate.nbytes = 1;
  471. break;
  472. case INAT_IMM_WORD:
  473. insn->immediate.value = get_next(short, insn);
  474. insn->immediate.nbytes = 2;
  475. break;
  476. case INAT_IMM_DWORD:
  477. insn->immediate.value = get_next(int, insn);
  478. insn->immediate.nbytes = 4;
  479. break;
  480. case INAT_IMM_QWORD:
  481. insn->immediate1.value = get_next(int, insn);
  482. insn->immediate1.nbytes = 4;
  483. insn->immediate2.value = get_next(int, insn);
  484. insn->immediate2.nbytes = 4;
  485. break;
  486. case INAT_IMM_PTR:
  487. if (!__get_immptr(insn))
  488. goto err_out;
  489. break;
  490. case INAT_IMM_VWORD32:
  491. if (!__get_immv32(insn))
  492. goto err_out;
  493. break;
  494. case INAT_IMM_VWORD:
  495. if (!__get_immv(insn))
  496. goto err_out;
  497. break;
  498. default:
  499. /* Here, insn must have an immediate, but failed */
  500. goto err_out;
  501. }
  502. if (inat_has_second_immediate(insn->attr)) {
  503. insn->immediate2.value = get_next(char, insn);
  504. insn->immediate2.nbytes = 1;
  505. }
  506. done:
  507. insn->immediate.got = 1;
  508. err_out:
  509. return;
  510. }
  511. /**
  512. * insn_get_length() - Get the length of instruction
  513. * @insn: &struct insn containing instruction
  514. *
  515. * If necessary, first collects the instruction up to and including the
  516. * immediates bytes.
  517. */
  518. void insn_get_length(struct insn *insn)
  519. {
  520. if (insn->length)
  521. return;
  522. if (!insn->immediate.got)
  523. insn_get_immediate(insn);
  524. insn->length = (unsigned char)((unsigned long)insn->next_byte
  525. - (unsigned long)insn->kaddr);
  526. }