time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/kernel_stat.h>
  17. #include <linux/errno.h>
  18. #include <linux/module.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/param.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/cpu.h>
  26. #include <linux/stop_machine.h>
  27. #include <linux/time.h>
  28. #include <linux/device.h>
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/smp.h>
  32. #include <linux/types.h>
  33. #include <linux/profile.h>
  34. #include <linux/timex.h>
  35. #include <linux/notifier.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/gfp.h>
  39. #include <linux/kprobes.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/delay.h>
  42. #include <asm/div64.h>
  43. #include <asm/vdso.h>
  44. #include <asm/irq.h>
  45. #include <asm/irq_regs.h>
  46. #include <asm/timer.h>
  47. #include <asm/etr.h>
  48. #include <asm/cio.h>
  49. #include "entry.h"
  50. /* change this if you have some constant time drift */
  51. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  52. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  53. u64 sched_clock_base_cc = -1; /* Force to data section. */
  54. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  55. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  56. /*
  57. * Scheduler clock - returns current time in nanosec units.
  58. */
  59. unsigned long long notrace __kprobes sched_clock(void)
  60. {
  61. return tod_to_ns(get_clock_monotonic());
  62. }
  63. /*
  64. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  65. */
  66. unsigned long long monotonic_clock(void)
  67. {
  68. return sched_clock();
  69. }
  70. EXPORT_SYMBOL(monotonic_clock);
  71. void tod_to_timeval(__u64 todval, struct timespec *xt)
  72. {
  73. unsigned long long sec;
  74. sec = todval >> 12;
  75. do_div(sec, 1000000);
  76. xt->tv_sec = sec;
  77. todval -= (sec * 1000000) << 12;
  78. xt->tv_nsec = ((todval * 1000) >> 12);
  79. }
  80. EXPORT_SYMBOL(tod_to_timeval);
  81. void clock_comparator_work(void)
  82. {
  83. struct clock_event_device *cd;
  84. S390_lowcore.clock_comparator = -1ULL;
  85. set_clock_comparator(S390_lowcore.clock_comparator);
  86. cd = &__get_cpu_var(comparators);
  87. cd->event_handler(cd);
  88. }
  89. /*
  90. * Fixup the clock comparator.
  91. */
  92. static void fixup_clock_comparator(unsigned long long delta)
  93. {
  94. /* If nobody is waiting there's nothing to fix. */
  95. if (S390_lowcore.clock_comparator == -1ULL)
  96. return;
  97. S390_lowcore.clock_comparator += delta;
  98. set_clock_comparator(S390_lowcore.clock_comparator);
  99. }
  100. static int s390_next_ktime(ktime_t expires,
  101. struct clock_event_device *evt)
  102. {
  103. struct timespec ts;
  104. u64 nsecs;
  105. ts.tv_sec = ts.tv_nsec = 0;
  106. monotonic_to_bootbased(&ts);
  107. nsecs = ktime_to_ns(ktime_add(timespec_to_ktime(ts), expires));
  108. do_div(nsecs, 125);
  109. S390_lowcore.clock_comparator = sched_clock_base_cc + (nsecs << 9);
  110. /* Program the maximum value if we have an overflow (== year 2042) */
  111. if (unlikely(S390_lowcore.clock_comparator < sched_clock_base_cc))
  112. S390_lowcore.clock_comparator = -1ULL;
  113. set_clock_comparator(S390_lowcore.clock_comparator);
  114. return 0;
  115. }
  116. static void s390_set_mode(enum clock_event_mode mode,
  117. struct clock_event_device *evt)
  118. {
  119. }
  120. /*
  121. * Set up lowcore and control register of the current cpu to
  122. * enable TOD clock and clock comparator interrupts.
  123. */
  124. void init_cpu_timer(void)
  125. {
  126. struct clock_event_device *cd;
  127. int cpu;
  128. S390_lowcore.clock_comparator = -1ULL;
  129. set_clock_comparator(S390_lowcore.clock_comparator);
  130. cpu = smp_processor_id();
  131. cd = &per_cpu(comparators, cpu);
  132. cd->name = "comparator";
  133. cd->features = CLOCK_EVT_FEAT_ONESHOT |
  134. CLOCK_EVT_FEAT_KTIME;
  135. cd->mult = 16777;
  136. cd->shift = 12;
  137. cd->min_delta_ns = 1;
  138. cd->max_delta_ns = LONG_MAX;
  139. cd->rating = 400;
  140. cd->cpumask = cpumask_of(cpu);
  141. cd->set_next_ktime = s390_next_ktime;
  142. cd->set_mode = s390_set_mode;
  143. clockevents_register_device(cd);
  144. /* Enable clock comparator timer interrupt. */
  145. __ctl_set_bit(0,11);
  146. /* Always allow the timing alert external interrupt. */
  147. __ctl_set_bit(0, 4);
  148. }
  149. static void clock_comparator_interrupt(struct ext_code ext_code,
  150. unsigned int param32,
  151. unsigned long param64)
  152. {
  153. kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
  154. if (S390_lowcore.clock_comparator == -1ULL)
  155. set_clock_comparator(S390_lowcore.clock_comparator);
  156. }
  157. static void etr_timing_alert(struct etr_irq_parm *);
  158. static void stp_timing_alert(struct stp_irq_parm *);
  159. static void timing_alert_interrupt(struct ext_code ext_code,
  160. unsigned int param32, unsigned long param64)
  161. {
  162. kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
  163. if (param32 & 0x00c40000)
  164. etr_timing_alert((struct etr_irq_parm *) &param32);
  165. if (param32 & 0x00038000)
  166. stp_timing_alert((struct stp_irq_parm *) &param32);
  167. }
  168. static void etr_reset(void);
  169. static void stp_reset(void);
  170. void read_persistent_clock(struct timespec *ts)
  171. {
  172. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  173. }
  174. void read_boot_clock(struct timespec *ts)
  175. {
  176. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  177. }
  178. static cycle_t read_tod_clock(struct clocksource *cs)
  179. {
  180. return get_clock();
  181. }
  182. static struct clocksource clocksource_tod = {
  183. .name = "tod",
  184. .rating = 400,
  185. .read = read_tod_clock,
  186. .mask = -1ULL,
  187. .mult = 1000,
  188. .shift = 12,
  189. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  190. };
  191. struct clocksource * __init clocksource_default_clock(void)
  192. {
  193. return &clocksource_tod;
  194. }
  195. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  196. struct clocksource *clock, u32 mult)
  197. {
  198. if (clock != &clocksource_tod)
  199. return;
  200. /* Make userspace gettimeofday spin until we're done. */
  201. ++vdso_data->tb_update_count;
  202. smp_wmb();
  203. vdso_data->xtime_tod_stamp = clock->cycle_last;
  204. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  205. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  206. vdso_data->wtom_clock_sec = wtm->tv_sec;
  207. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  208. vdso_data->ntp_mult = mult;
  209. smp_wmb();
  210. ++vdso_data->tb_update_count;
  211. }
  212. extern struct timezone sys_tz;
  213. void update_vsyscall_tz(void)
  214. {
  215. /* Make userspace gettimeofday spin until we're done. */
  216. ++vdso_data->tb_update_count;
  217. smp_wmb();
  218. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  219. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  220. smp_wmb();
  221. ++vdso_data->tb_update_count;
  222. }
  223. /*
  224. * Initialize the TOD clock and the CPU timer of
  225. * the boot cpu.
  226. */
  227. void __init time_init(void)
  228. {
  229. /* Reset time synchronization interfaces. */
  230. etr_reset();
  231. stp_reset();
  232. /* request the clock comparator external interrupt */
  233. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  234. panic("Couldn't request external interrupt 0x1004");
  235. /* request the timing alert external interrupt */
  236. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  237. panic("Couldn't request external interrupt 0x1406");
  238. if (clocksource_register(&clocksource_tod) != 0)
  239. panic("Could not register TOD clock source");
  240. /* Enable TOD clock interrupts on the boot cpu. */
  241. init_cpu_timer();
  242. /* Enable cpu timer interrupts on the boot cpu. */
  243. vtime_init();
  244. }
  245. /*
  246. * The time is "clock". old is what we think the time is.
  247. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  248. * "delay" is an approximation how long the synchronization took. If
  249. * the time correction is positive, then "delay" is subtracted from
  250. * the time difference and only the remaining part is passed to ntp.
  251. */
  252. static unsigned long long adjust_time(unsigned long long old,
  253. unsigned long long clock,
  254. unsigned long long delay)
  255. {
  256. unsigned long long delta, ticks;
  257. struct timex adjust;
  258. if (clock > old) {
  259. /* It is later than we thought. */
  260. delta = ticks = clock - old;
  261. delta = ticks = (delta < delay) ? 0 : delta - delay;
  262. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  263. adjust.offset = ticks * (1000000 / HZ);
  264. } else {
  265. /* It is earlier than we thought. */
  266. delta = ticks = old - clock;
  267. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  268. delta = -delta;
  269. adjust.offset = -ticks * (1000000 / HZ);
  270. }
  271. sched_clock_base_cc += delta;
  272. if (adjust.offset != 0) {
  273. pr_notice("The ETR interface has adjusted the clock "
  274. "by %li microseconds\n", adjust.offset);
  275. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  276. do_adjtimex(&adjust);
  277. }
  278. return delta;
  279. }
  280. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  281. static DEFINE_MUTEX(clock_sync_mutex);
  282. static unsigned long clock_sync_flags;
  283. #define CLOCK_SYNC_HAS_ETR 0
  284. #define CLOCK_SYNC_HAS_STP 1
  285. #define CLOCK_SYNC_ETR 2
  286. #define CLOCK_SYNC_STP 3
  287. /*
  288. * The synchronous get_clock function. It will write the current clock
  289. * value to the clock pointer and return 0 if the clock is in sync with
  290. * the external time source. If the clock mode is local it will return
  291. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  292. * reference.
  293. */
  294. int get_sync_clock(unsigned long long *clock)
  295. {
  296. atomic_t *sw_ptr;
  297. unsigned int sw0, sw1;
  298. sw_ptr = &get_cpu_var(clock_sync_word);
  299. sw0 = atomic_read(sw_ptr);
  300. *clock = get_clock();
  301. sw1 = atomic_read(sw_ptr);
  302. put_cpu_var(clock_sync_word);
  303. if (sw0 == sw1 && (sw0 & 0x80000000U))
  304. /* Success: time is in sync. */
  305. return 0;
  306. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  307. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  308. return -ENOSYS;
  309. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  310. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  311. return -EACCES;
  312. return -EAGAIN;
  313. }
  314. EXPORT_SYMBOL(get_sync_clock);
  315. /*
  316. * Make get_sync_clock return -EAGAIN.
  317. */
  318. static void disable_sync_clock(void *dummy)
  319. {
  320. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  321. /*
  322. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  323. * fail until the sync bit is turned back on. In addition
  324. * increase the "sequence" counter to avoid the race of an
  325. * etr event and the complete recovery against get_sync_clock.
  326. */
  327. atomic_clear_mask(0x80000000, sw_ptr);
  328. atomic_inc(sw_ptr);
  329. }
  330. /*
  331. * Make get_sync_clock return 0 again.
  332. * Needs to be called from a context disabled for preemption.
  333. */
  334. static void enable_sync_clock(void)
  335. {
  336. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  337. atomic_set_mask(0x80000000, sw_ptr);
  338. }
  339. /*
  340. * Function to check if the clock is in sync.
  341. */
  342. static inline int check_sync_clock(void)
  343. {
  344. atomic_t *sw_ptr;
  345. int rc;
  346. sw_ptr = &get_cpu_var(clock_sync_word);
  347. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  348. put_cpu_var(clock_sync_word);
  349. return rc;
  350. }
  351. /* Single threaded workqueue used for etr and stp sync events */
  352. static struct workqueue_struct *time_sync_wq;
  353. static void __init time_init_wq(void)
  354. {
  355. if (time_sync_wq)
  356. return;
  357. time_sync_wq = create_singlethread_workqueue("timesync");
  358. }
  359. /*
  360. * External Time Reference (ETR) code.
  361. */
  362. static int etr_port0_online;
  363. static int etr_port1_online;
  364. static int etr_steai_available;
  365. static int __init early_parse_etr(char *p)
  366. {
  367. if (strncmp(p, "off", 3) == 0)
  368. etr_port0_online = etr_port1_online = 0;
  369. else if (strncmp(p, "port0", 5) == 0)
  370. etr_port0_online = 1;
  371. else if (strncmp(p, "port1", 5) == 0)
  372. etr_port1_online = 1;
  373. else if (strncmp(p, "on", 2) == 0)
  374. etr_port0_online = etr_port1_online = 1;
  375. return 0;
  376. }
  377. early_param("etr", early_parse_etr);
  378. enum etr_event {
  379. ETR_EVENT_PORT0_CHANGE,
  380. ETR_EVENT_PORT1_CHANGE,
  381. ETR_EVENT_PORT_ALERT,
  382. ETR_EVENT_SYNC_CHECK,
  383. ETR_EVENT_SWITCH_LOCAL,
  384. ETR_EVENT_UPDATE,
  385. };
  386. /*
  387. * Valid bit combinations of the eacr register are (x = don't care):
  388. * e0 e1 dp p0 p1 ea es sl
  389. * 0 0 x 0 0 0 0 0 initial, disabled state
  390. * 0 0 x 0 1 1 0 0 port 1 online
  391. * 0 0 x 1 0 1 0 0 port 0 online
  392. * 0 0 x 1 1 1 0 0 both ports online
  393. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  394. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  395. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  396. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  397. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  398. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  399. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  400. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  401. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  402. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  403. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  404. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  405. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  406. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  407. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  408. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  409. */
  410. static struct etr_eacr etr_eacr;
  411. static u64 etr_tolec; /* time of last eacr update */
  412. static struct etr_aib etr_port0;
  413. static int etr_port0_uptodate;
  414. static struct etr_aib etr_port1;
  415. static int etr_port1_uptodate;
  416. static unsigned long etr_events;
  417. static struct timer_list etr_timer;
  418. static void etr_timeout(unsigned long dummy);
  419. static void etr_work_fn(struct work_struct *work);
  420. static DEFINE_MUTEX(etr_work_mutex);
  421. static DECLARE_WORK(etr_work, etr_work_fn);
  422. /*
  423. * Reset ETR attachment.
  424. */
  425. static void etr_reset(void)
  426. {
  427. etr_eacr = (struct etr_eacr) {
  428. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  429. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  430. .es = 0, .sl = 0 };
  431. if (etr_setr(&etr_eacr) == 0) {
  432. etr_tolec = get_clock();
  433. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  434. if (etr_port0_online && etr_port1_online)
  435. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  436. } else if (etr_port0_online || etr_port1_online) {
  437. pr_warning("The real or virtual hardware system does "
  438. "not provide an ETR interface\n");
  439. etr_port0_online = etr_port1_online = 0;
  440. }
  441. }
  442. static int __init etr_init(void)
  443. {
  444. struct etr_aib aib;
  445. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  446. return 0;
  447. time_init_wq();
  448. /* Check if this machine has the steai instruction. */
  449. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  450. etr_steai_available = 1;
  451. setup_timer(&etr_timer, etr_timeout, 0UL);
  452. if (etr_port0_online) {
  453. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  454. queue_work(time_sync_wq, &etr_work);
  455. }
  456. if (etr_port1_online) {
  457. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  458. queue_work(time_sync_wq, &etr_work);
  459. }
  460. return 0;
  461. }
  462. arch_initcall(etr_init);
  463. /*
  464. * Two sorts of ETR machine checks. The architecture reads:
  465. * "When a machine-check niterruption occurs and if a switch-to-local or
  466. * ETR-sync-check interrupt request is pending but disabled, this pending
  467. * disabled interruption request is indicated and is cleared".
  468. * Which means that we can get etr_switch_to_local events from the machine
  469. * check handler although the interruption condition is disabled. Lovely..
  470. */
  471. /*
  472. * Switch to local machine check. This is called when the last usable
  473. * ETR port goes inactive. After switch to local the clock is not in sync.
  474. */
  475. void etr_switch_to_local(void)
  476. {
  477. if (!etr_eacr.sl)
  478. return;
  479. disable_sync_clock(NULL);
  480. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  481. etr_eacr.es = etr_eacr.sl = 0;
  482. etr_setr(&etr_eacr);
  483. queue_work(time_sync_wq, &etr_work);
  484. }
  485. }
  486. /*
  487. * ETR sync check machine check. This is called when the ETR OTE and the
  488. * local clock OTE are farther apart than the ETR sync check tolerance.
  489. * After a ETR sync check the clock is not in sync. The machine check
  490. * is broadcasted to all cpus at the same time.
  491. */
  492. void etr_sync_check(void)
  493. {
  494. if (!etr_eacr.es)
  495. return;
  496. disable_sync_clock(NULL);
  497. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  498. etr_eacr.es = 0;
  499. etr_setr(&etr_eacr);
  500. queue_work(time_sync_wq, &etr_work);
  501. }
  502. }
  503. /*
  504. * ETR timing alert. There are two causes:
  505. * 1) port state change, check the usability of the port
  506. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  507. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  508. * or ETR-data word 4 (edf4) has changed.
  509. */
  510. static void etr_timing_alert(struct etr_irq_parm *intparm)
  511. {
  512. if (intparm->pc0)
  513. /* ETR port 0 state change. */
  514. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  515. if (intparm->pc1)
  516. /* ETR port 1 state change. */
  517. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  518. if (intparm->eai)
  519. /*
  520. * ETR port alert on either port 0, 1 or both.
  521. * Both ports are not up-to-date now.
  522. */
  523. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  524. queue_work(time_sync_wq, &etr_work);
  525. }
  526. static void etr_timeout(unsigned long dummy)
  527. {
  528. set_bit(ETR_EVENT_UPDATE, &etr_events);
  529. queue_work(time_sync_wq, &etr_work);
  530. }
  531. /*
  532. * Check if the etr mode is pss.
  533. */
  534. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  535. {
  536. return eacr.es && !eacr.sl;
  537. }
  538. /*
  539. * Check if the etr mode is etr.
  540. */
  541. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  542. {
  543. return eacr.es && eacr.sl;
  544. }
  545. /*
  546. * Check if the port can be used for TOD synchronization.
  547. * For PPS mode the port has to receive OTEs. For ETR mode
  548. * the port has to receive OTEs, the ETR stepping bit has to
  549. * be zero and the validity bits for data frame 1, 2, and 3
  550. * have to be 1.
  551. */
  552. static int etr_port_valid(struct etr_aib *aib, int port)
  553. {
  554. unsigned int psc;
  555. /* Check that this port is receiving OTEs. */
  556. if (aib->tsp == 0)
  557. return 0;
  558. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  559. if (psc == etr_lpsc_pps_mode)
  560. return 1;
  561. if (psc == etr_lpsc_operational_step)
  562. return !aib->esw.y && aib->slsw.v1 &&
  563. aib->slsw.v2 && aib->slsw.v3;
  564. return 0;
  565. }
  566. /*
  567. * Check if two ports are on the same network.
  568. */
  569. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  570. {
  571. // FIXME: any other fields we have to compare?
  572. return aib1->edf1.net_id == aib2->edf1.net_id;
  573. }
  574. /*
  575. * Wrapper for etr_stei that converts physical port states
  576. * to logical port states to be consistent with the output
  577. * of stetr (see etr_psc vs. etr_lpsc).
  578. */
  579. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  580. {
  581. BUG_ON(etr_steai(aib, func) != 0);
  582. /* Convert port state to logical port state. */
  583. if (aib->esw.psc0 == 1)
  584. aib->esw.psc0 = 2;
  585. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  586. aib->esw.psc0 = 1;
  587. if (aib->esw.psc1 == 1)
  588. aib->esw.psc1 = 2;
  589. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  590. aib->esw.psc1 = 1;
  591. }
  592. /*
  593. * Check if the aib a2 is still connected to the same attachment as
  594. * aib a1, the etv values differ by one and a2 is valid.
  595. */
  596. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  597. {
  598. int state_a1, state_a2;
  599. /* Paranoia check: e0/e1 should better be the same. */
  600. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  601. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  602. return 0;
  603. /* Still connected to the same etr ? */
  604. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  605. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  606. if (state_a1 == etr_lpsc_operational_step) {
  607. if (state_a2 != etr_lpsc_operational_step ||
  608. a1->edf1.net_id != a2->edf1.net_id ||
  609. a1->edf1.etr_id != a2->edf1.etr_id ||
  610. a1->edf1.etr_pn != a2->edf1.etr_pn)
  611. return 0;
  612. } else if (state_a2 != etr_lpsc_pps_mode)
  613. return 0;
  614. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  615. if (a1->edf2.etv + 1 != a2->edf2.etv)
  616. return 0;
  617. if (!etr_port_valid(a2, p))
  618. return 0;
  619. return 1;
  620. }
  621. struct clock_sync_data {
  622. atomic_t cpus;
  623. int in_sync;
  624. unsigned long long fixup_cc;
  625. int etr_port;
  626. struct etr_aib *etr_aib;
  627. };
  628. static void clock_sync_cpu(struct clock_sync_data *sync)
  629. {
  630. atomic_dec(&sync->cpus);
  631. enable_sync_clock();
  632. /*
  633. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  634. * is called on all other cpus while the TOD clocks is stopped.
  635. * __udelay will stop the cpu on an enabled wait psw until the
  636. * TOD is running again.
  637. */
  638. while (sync->in_sync == 0) {
  639. __udelay(1);
  640. /*
  641. * A different cpu changes *in_sync. Therefore use
  642. * barrier() to force memory access.
  643. */
  644. barrier();
  645. }
  646. if (sync->in_sync != 1)
  647. /* Didn't work. Clear per-cpu in sync bit again. */
  648. disable_sync_clock(NULL);
  649. /*
  650. * This round of TOD syncing is done. Set the clock comparator
  651. * to the next tick and let the processor continue.
  652. */
  653. fixup_clock_comparator(sync->fixup_cc);
  654. }
  655. /*
  656. * Sync the TOD clock using the port referred to by aibp. This port
  657. * has to be enabled and the other port has to be disabled. The
  658. * last eacr update has to be more than 1.6 seconds in the past.
  659. */
  660. static int etr_sync_clock(void *data)
  661. {
  662. static int first;
  663. unsigned long long clock, old_clock, delay, delta;
  664. struct clock_sync_data *etr_sync;
  665. struct etr_aib *sync_port, *aib;
  666. int port;
  667. int rc;
  668. etr_sync = data;
  669. if (xchg(&first, 1) == 1) {
  670. /* Slave */
  671. clock_sync_cpu(etr_sync);
  672. return 0;
  673. }
  674. /* Wait until all other cpus entered the sync function. */
  675. while (atomic_read(&etr_sync->cpus) != 0)
  676. cpu_relax();
  677. port = etr_sync->etr_port;
  678. aib = etr_sync->etr_aib;
  679. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  680. enable_sync_clock();
  681. /* Set clock to next OTE. */
  682. __ctl_set_bit(14, 21);
  683. __ctl_set_bit(0, 29);
  684. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  685. old_clock = get_clock();
  686. if (set_clock(clock) == 0) {
  687. __udelay(1); /* Wait for the clock to start. */
  688. __ctl_clear_bit(0, 29);
  689. __ctl_clear_bit(14, 21);
  690. etr_stetr(aib);
  691. /* Adjust Linux timing variables. */
  692. delay = (unsigned long long)
  693. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  694. delta = adjust_time(old_clock, clock, delay);
  695. etr_sync->fixup_cc = delta;
  696. fixup_clock_comparator(delta);
  697. /* Verify that the clock is properly set. */
  698. if (!etr_aib_follows(sync_port, aib, port)) {
  699. /* Didn't work. */
  700. disable_sync_clock(NULL);
  701. etr_sync->in_sync = -EAGAIN;
  702. rc = -EAGAIN;
  703. } else {
  704. etr_sync->in_sync = 1;
  705. rc = 0;
  706. }
  707. } else {
  708. /* Could not set the clock ?!? */
  709. __ctl_clear_bit(0, 29);
  710. __ctl_clear_bit(14, 21);
  711. disable_sync_clock(NULL);
  712. etr_sync->in_sync = -EAGAIN;
  713. rc = -EAGAIN;
  714. }
  715. xchg(&first, 0);
  716. return rc;
  717. }
  718. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  719. {
  720. struct clock_sync_data etr_sync;
  721. struct etr_aib *sync_port;
  722. int follows;
  723. int rc;
  724. /* Check if the current aib is adjacent to the sync port aib. */
  725. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  726. follows = etr_aib_follows(sync_port, aib, port);
  727. memcpy(sync_port, aib, sizeof(*aib));
  728. if (!follows)
  729. return -EAGAIN;
  730. memset(&etr_sync, 0, sizeof(etr_sync));
  731. etr_sync.etr_aib = aib;
  732. etr_sync.etr_port = port;
  733. get_online_cpus();
  734. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  735. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  736. put_online_cpus();
  737. return rc;
  738. }
  739. /*
  740. * Handle the immediate effects of the different events.
  741. * The port change event is used for online/offline changes.
  742. */
  743. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  744. {
  745. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  746. eacr.es = 0;
  747. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  748. eacr.es = eacr.sl = 0;
  749. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  750. etr_port0_uptodate = etr_port1_uptodate = 0;
  751. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  752. if (eacr.e0)
  753. /*
  754. * Port change of an enabled port. We have to
  755. * assume that this can have caused an stepping
  756. * port switch.
  757. */
  758. etr_tolec = get_clock();
  759. eacr.p0 = etr_port0_online;
  760. if (!eacr.p0)
  761. eacr.e0 = 0;
  762. etr_port0_uptodate = 0;
  763. }
  764. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  765. if (eacr.e1)
  766. /*
  767. * Port change of an enabled port. We have to
  768. * assume that this can have caused an stepping
  769. * port switch.
  770. */
  771. etr_tolec = get_clock();
  772. eacr.p1 = etr_port1_online;
  773. if (!eacr.p1)
  774. eacr.e1 = 0;
  775. etr_port1_uptodate = 0;
  776. }
  777. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  778. return eacr;
  779. }
  780. /*
  781. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  782. * one of the ports needs an update.
  783. */
  784. static void etr_set_tolec_timeout(unsigned long long now)
  785. {
  786. unsigned long micros;
  787. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  788. (!etr_eacr.p1 || etr_port1_uptodate))
  789. return;
  790. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  791. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  792. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  793. }
  794. /*
  795. * Set up a time that expires after 1/2 second.
  796. */
  797. static void etr_set_sync_timeout(void)
  798. {
  799. mod_timer(&etr_timer, jiffies + HZ/2);
  800. }
  801. /*
  802. * Update the aib information for one or both ports.
  803. */
  804. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  805. struct etr_eacr eacr)
  806. {
  807. /* With both ports disabled the aib information is useless. */
  808. if (!eacr.e0 && !eacr.e1)
  809. return eacr;
  810. /* Update port0 or port1 with aib stored in etr_work_fn. */
  811. if (aib->esw.q == 0) {
  812. /* Information for port 0 stored. */
  813. if (eacr.p0 && !etr_port0_uptodate) {
  814. etr_port0 = *aib;
  815. if (etr_port0_online)
  816. etr_port0_uptodate = 1;
  817. }
  818. } else {
  819. /* Information for port 1 stored. */
  820. if (eacr.p1 && !etr_port1_uptodate) {
  821. etr_port1 = *aib;
  822. if (etr_port0_online)
  823. etr_port1_uptodate = 1;
  824. }
  825. }
  826. /*
  827. * Do not try to get the alternate port aib if the clock
  828. * is not in sync yet.
  829. */
  830. if (!eacr.es || !check_sync_clock())
  831. return eacr;
  832. /*
  833. * If steai is available we can get the information about
  834. * the other port immediately. If only stetr is available the
  835. * data-port bit toggle has to be used.
  836. */
  837. if (etr_steai_available) {
  838. if (eacr.p0 && !etr_port0_uptodate) {
  839. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  840. etr_port0_uptodate = 1;
  841. }
  842. if (eacr.p1 && !etr_port1_uptodate) {
  843. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  844. etr_port1_uptodate = 1;
  845. }
  846. } else {
  847. /*
  848. * One port was updated above, if the other
  849. * port is not uptodate toggle dp bit.
  850. */
  851. if ((eacr.p0 && !etr_port0_uptodate) ||
  852. (eacr.p1 && !etr_port1_uptodate))
  853. eacr.dp ^= 1;
  854. else
  855. eacr.dp = 0;
  856. }
  857. return eacr;
  858. }
  859. /*
  860. * Write new etr control register if it differs from the current one.
  861. * Return 1 if etr_tolec has been updated as well.
  862. */
  863. static void etr_update_eacr(struct etr_eacr eacr)
  864. {
  865. int dp_changed;
  866. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  867. /* No change, return. */
  868. return;
  869. /*
  870. * The disable of an active port of the change of the data port
  871. * bit can/will cause a change in the data port.
  872. */
  873. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  874. (etr_eacr.dp ^ eacr.dp) != 0;
  875. etr_eacr = eacr;
  876. etr_setr(&etr_eacr);
  877. if (dp_changed)
  878. etr_tolec = get_clock();
  879. }
  880. /*
  881. * ETR work. In this function you'll find the main logic. In
  882. * particular this is the only function that calls etr_update_eacr(),
  883. * it "controls" the etr control register.
  884. */
  885. static void etr_work_fn(struct work_struct *work)
  886. {
  887. unsigned long long now;
  888. struct etr_eacr eacr;
  889. struct etr_aib aib;
  890. int sync_port;
  891. /* prevent multiple execution. */
  892. mutex_lock(&etr_work_mutex);
  893. /* Create working copy of etr_eacr. */
  894. eacr = etr_eacr;
  895. /* Check for the different events and their immediate effects. */
  896. eacr = etr_handle_events(eacr);
  897. /* Check if ETR is supposed to be active. */
  898. eacr.ea = eacr.p0 || eacr.p1;
  899. if (!eacr.ea) {
  900. /* Both ports offline. Reset everything. */
  901. eacr.dp = eacr.es = eacr.sl = 0;
  902. on_each_cpu(disable_sync_clock, NULL, 1);
  903. del_timer_sync(&etr_timer);
  904. etr_update_eacr(eacr);
  905. goto out_unlock;
  906. }
  907. /* Store aib to get the current ETR status word. */
  908. BUG_ON(etr_stetr(&aib) != 0);
  909. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  910. now = get_clock();
  911. /*
  912. * Update the port information if the last stepping port change
  913. * or data port change is older than 1.6 seconds.
  914. */
  915. if (now >= etr_tolec + (1600000 << 12))
  916. eacr = etr_handle_update(&aib, eacr);
  917. /*
  918. * Select ports to enable. The preferred synchronization mode is PPS.
  919. * If a port can be enabled depends on a number of things:
  920. * 1) The port needs to be online and uptodate. A port is not
  921. * disabled just because it is not uptodate, but it is only
  922. * enabled if it is uptodate.
  923. * 2) The port needs to have the same mode (pps / etr).
  924. * 3) The port needs to be usable -> etr_port_valid() == 1
  925. * 4) To enable the second port the clock needs to be in sync.
  926. * 5) If both ports are useable and are ETR ports, the network id
  927. * has to be the same.
  928. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  929. */
  930. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  931. eacr.sl = 0;
  932. eacr.e0 = 1;
  933. if (!etr_mode_is_pps(etr_eacr))
  934. eacr.es = 0;
  935. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  936. eacr.e1 = 0;
  937. // FIXME: uptodate checks ?
  938. else if (etr_port0_uptodate && etr_port1_uptodate)
  939. eacr.e1 = 1;
  940. sync_port = (etr_port0_uptodate &&
  941. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  942. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  943. eacr.sl = 0;
  944. eacr.e0 = 0;
  945. eacr.e1 = 1;
  946. if (!etr_mode_is_pps(etr_eacr))
  947. eacr.es = 0;
  948. sync_port = (etr_port1_uptodate &&
  949. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  950. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  951. eacr.sl = 1;
  952. eacr.e0 = 1;
  953. if (!etr_mode_is_etr(etr_eacr))
  954. eacr.es = 0;
  955. if (!eacr.es || !eacr.p1 ||
  956. aib.esw.psc1 != etr_lpsc_operational_alt)
  957. eacr.e1 = 0;
  958. else if (etr_port0_uptodate && etr_port1_uptodate &&
  959. etr_compare_network(&etr_port0, &etr_port1))
  960. eacr.e1 = 1;
  961. sync_port = (etr_port0_uptodate &&
  962. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  963. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  964. eacr.sl = 1;
  965. eacr.e0 = 0;
  966. eacr.e1 = 1;
  967. if (!etr_mode_is_etr(etr_eacr))
  968. eacr.es = 0;
  969. sync_port = (etr_port1_uptodate &&
  970. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  971. } else {
  972. /* Both ports not usable. */
  973. eacr.es = eacr.sl = 0;
  974. sync_port = -1;
  975. }
  976. /*
  977. * If the clock is in sync just update the eacr and return.
  978. * If there is no valid sync port wait for a port update.
  979. */
  980. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  981. etr_update_eacr(eacr);
  982. etr_set_tolec_timeout(now);
  983. goto out_unlock;
  984. }
  985. /*
  986. * Prepare control register for clock syncing
  987. * (reset data port bit, set sync check control.
  988. */
  989. eacr.dp = 0;
  990. eacr.es = 1;
  991. /*
  992. * Update eacr and try to synchronize the clock. If the update
  993. * of eacr caused a stepping port switch (or if we have to
  994. * assume that a stepping port switch has occurred) or the
  995. * clock syncing failed, reset the sync check control bit
  996. * and set up a timer to try again after 0.5 seconds
  997. */
  998. etr_update_eacr(eacr);
  999. if (now < etr_tolec + (1600000 << 12) ||
  1000. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1001. /* Sync failed. Try again in 1/2 second. */
  1002. eacr.es = 0;
  1003. etr_update_eacr(eacr);
  1004. etr_set_sync_timeout();
  1005. } else
  1006. etr_set_tolec_timeout(now);
  1007. out_unlock:
  1008. mutex_unlock(&etr_work_mutex);
  1009. }
  1010. /*
  1011. * Sysfs interface functions
  1012. */
  1013. static struct bus_type etr_subsys = {
  1014. .name = "etr",
  1015. .dev_name = "etr",
  1016. };
  1017. static struct device etr_port0_dev = {
  1018. .id = 0,
  1019. .bus = &etr_subsys,
  1020. };
  1021. static struct device etr_port1_dev = {
  1022. .id = 1,
  1023. .bus = &etr_subsys,
  1024. };
  1025. /*
  1026. * ETR subsys attributes
  1027. */
  1028. static ssize_t etr_stepping_port_show(struct device *dev,
  1029. struct device_attribute *attr,
  1030. char *buf)
  1031. {
  1032. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1033. }
  1034. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1035. static ssize_t etr_stepping_mode_show(struct device *dev,
  1036. struct device_attribute *attr,
  1037. char *buf)
  1038. {
  1039. char *mode_str;
  1040. if (etr_mode_is_pps(etr_eacr))
  1041. mode_str = "pps";
  1042. else if (etr_mode_is_etr(etr_eacr))
  1043. mode_str = "etr";
  1044. else
  1045. mode_str = "local";
  1046. return sprintf(buf, "%s\n", mode_str);
  1047. }
  1048. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1049. /*
  1050. * ETR port attributes
  1051. */
  1052. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1053. {
  1054. if (dev == &etr_port0_dev)
  1055. return etr_port0_online ? &etr_port0 : NULL;
  1056. else
  1057. return etr_port1_online ? &etr_port1 : NULL;
  1058. }
  1059. static ssize_t etr_online_show(struct device *dev,
  1060. struct device_attribute *attr,
  1061. char *buf)
  1062. {
  1063. unsigned int online;
  1064. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1065. return sprintf(buf, "%i\n", online);
  1066. }
  1067. static ssize_t etr_online_store(struct device *dev,
  1068. struct device_attribute *attr,
  1069. const char *buf, size_t count)
  1070. {
  1071. unsigned int value;
  1072. value = simple_strtoul(buf, NULL, 0);
  1073. if (value != 0 && value != 1)
  1074. return -EINVAL;
  1075. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1076. return -EOPNOTSUPP;
  1077. mutex_lock(&clock_sync_mutex);
  1078. if (dev == &etr_port0_dev) {
  1079. if (etr_port0_online == value)
  1080. goto out; /* Nothing to do. */
  1081. etr_port0_online = value;
  1082. if (etr_port0_online && etr_port1_online)
  1083. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1084. else
  1085. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1086. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1087. queue_work(time_sync_wq, &etr_work);
  1088. } else {
  1089. if (etr_port1_online == value)
  1090. goto out; /* Nothing to do. */
  1091. etr_port1_online = value;
  1092. if (etr_port0_online && etr_port1_online)
  1093. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1094. else
  1095. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1096. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1097. queue_work(time_sync_wq, &etr_work);
  1098. }
  1099. out:
  1100. mutex_unlock(&clock_sync_mutex);
  1101. return count;
  1102. }
  1103. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1104. static ssize_t etr_stepping_control_show(struct device *dev,
  1105. struct device_attribute *attr,
  1106. char *buf)
  1107. {
  1108. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1109. etr_eacr.e0 : etr_eacr.e1);
  1110. }
  1111. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1112. static ssize_t etr_mode_code_show(struct device *dev,
  1113. struct device_attribute *attr, char *buf)
  1114. {
  1115. if (!etr_port0_online && !etr_port1_online)
  1116. /* Status word is not uptodate if both ports are offline. */
  1117. return -ENODATA;
  1118. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1119. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1120. }
  1121. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1122. static ssize_t etr_untuned_show(struct device *dev,
  1123. struct device_attribute *attr, char *buf)
  1124. {
  1125. struct etr_aib *aib = etr_aib_from_dev(dev);
  1126. if (!aib || !aib->slsw.v1)
  1127. return -ENODATA;
  1128. return sprintf(buf, "%i\n", aib->edf1.u);
  1129. }
  1130. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1131. static ssize_t etr_network_id_show(struct device *dev,
  1132. struct device_attribute *attr, char *buf)
  1133. {
  1134. struct etr_aib *aib = etr_aib_from_dev(dev);
  1135. if (!aib || !aib->slsw.v1)
  1136. return -ENODATA;
  1137. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1138. }
  1139. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1140. static ssize_t etr_id_show(struct device *dev,
  1141. struct device_attribute *attr, char *buf)
  1142. {
  1143. struct etr_aib *aib = etr_aib_from_dev(dev);
  1144. if (!aib || !aib->slsw.v1)
  1145. return -ENODATA;
  1146. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1147. }
  1148. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1149. static ssize_t etr_port_number_show(struct device *dev,
  1150. struct device_attribute *attr, char *buf)
  1151. {
  1152. struct etr_aib *aib = etr_aib_from_dev(dev);
  1153. if (!aib || !aib->slsw.v1)
  1154. return -ENODATA;
  1155. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1156. }
  1157. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1158. static ssize_t etr_coupled_show(struct device *dev,
  1159. struct device_attribute *attr, char *buf)
  1160. {
  1161. struct etr_aib *aib = etr_aib_from_dev(dev);
  1162. if (!aib || !aib->slsw.v3)
  1163. return -ENODATA;
  1164. return sprintf(buf, "%i\n", aib->edf3.c);
  1165. }
  1166. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1167. static ssize_t etr_local_time_show(struct device *dev,
  1168. struct device_attribute *attr, char *buf)
  1169. {
  1170. struct etr_aib *aib = etr_aib_from_dev(dev);
  1171. if (!aib || !aib->slsw.v3)
  1172. return -ENODATA;
  1173. return sprintf(buf, "%i\n", aib->edf3.blto);
  1174. }
  1175. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1176. static ssize_t etr_utc_offset_show(struct device *dev,
  1177. struct device_attribute *attr, char *buf)
  1178. {
  1179. struct etr_aib *aib = etr_aib_from_dev(dev);
  1180. if (!aib || !aib->slsw.v3)
  1181. return -ENODATA;
  1182. return sprintf(buf, "%i\n", aib->edf3.buo);
  1183. }
  1184. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1185. static struct device_attribute *etr_port_attributes[] = {
  1186. &dev_attr_online,
  1187. &dev_attr_stepping_control,
  1188. &dev_attr_state_code,
  1189. &dev_attr_untuned,
  1190. &dev_attr_network,
  1191. &dev_attr_id,
  1192. &dev_attr_port,
  1193. &dev_attr_coupled,
  1194. &dev_attr_local_time,
  1195. &dev_attr_utc_offset,
  1196. NULL
  1197. };
  1198. static int __init etr_register_port(struct device *dev)
  1199. {
  1200. struct device_attribute **attr;
  1201. int rc;
  1202. rc = device_register(dev);
  1203. if (rc)
  1204. goto out;
  1205. for (attr = etr_port_attributes; *attr; attr++) {
  1206. rc = device_create_file(dev, *attr);
  1207. if (rc)
  1208. goto out_unreg;
  1209. }
  1210. return 0;
  1211. out_unreg:
  1212. for (; attr >= etr_port_attributes; attr--)
  1213. device_remove_file(dev, *attr);
  1214. device_unregister(dev);
  1215. out:
  1216. return rc;
  1217. }
  1218. static void __init etr_unregister_port(struct device *dev)
  1219. {
  1220. struct device_attribute **attr;
  1221. for (attr = etr_port_attributes; *attr; attr++)
  1222. device_remove_file(dev, *attr);
  1223. device_unregister(dev);
  1224. }
  1225. static int __init etr_init_sysfs(void)
  1226. {
  1227. int rc;
  1228. rc = subsys_system_register(&etr_subsys, NULL);
  1229. if (rc)
  1230. goto out;
  1231. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1232. if (rc)
  1233. goto out_unreg_subsys;
  1234. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1235. if (rc)
  1236. goto out_remove_stepping_port;
  1237. rc = etr_register_port(&etr_port0_dev);
  1238. if (rc)
  1239. goto out_remove_stepping_mode;
  1240. rc = etr_register_port(&etr_port1_dev);
  1241. if (rc)
  1242. goto out_remove_port0;
  1243. return 0;
  1244. out_remove_port0:
  1245. etr_unregister_port(&etr_port0_dev);
  1246. out_remove_stepping_mode:
  1247. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1248. out_remove_stepping_port:
  1249. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1250. out_unreg_subsys:
  1251. bus_unregister(&etr_subsys);
  1252. out:
  1253. return rc;
  1254. }
  1255. device_initcall(etr_init_sysfs);
  1256. /*
  1257. * Server Time Protocol (STP) code.
  1258. */
  1259. static int stp_online;
  1260. static struct stp_sstpi stp_info;
  1261. static void *stp_page;
  1262. static void stp_work_fn(struct work_struct *work);
  1263. static DEFINE_MUTEX(stp_work_mutex);
  1264. static DECLARE_WORK(stp_work, stp_work_fn);
  1265. static struct timer_list stp_timer;
  1266. static int __init early_parse_stp(char *p)
  1267. {
  1268. if (strncmp(p, "off", 3) == 0)
  1269. stp_online = 0;
  1270. else if (strncmp(p, "on", 2) == 0)
  1271. stp_online = 1;
  1272. return 0;
  1273. }
  1274. early_param("stp", early_parse_stp);
  1275. /*
  1276. * Reset STP attachment.
  1277. */
  1278. static void __init stp_reset(void)
  1279. {
  1280. int rc;
  1281. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1282. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1283. if (rc == 0)
  1284. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1285. else if (stp_online) {
  1286. pr_warning("The real or virtual hardware system does "
  1287. "not provide an STP interface\n");
  1288. free_page((unsigned long) stp_page);
  1289. stp_page = NULL;
  1290. stp_online = 0;
  1291. }
  1292. }
  1293. static void stp_timeout(unsigned long dummy)
  1294. {
  1295. queue_work(time_sync_wq, &stp_work);
  1296. }
  1297. static int __init stp_init(void)
  1298. {
  1299. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1300. return 0;
  1301. setup_timer(&stp_timer, stp_timeout, 0UL);
  1302. time_init_wq();
  1303. if (!stp_online)
  1304. return 0;
  1305. queue_work(time_sync_wq, &stp_work);
  1306. return 0;
  1307. }
  1308. arch_initcall(stp_init);
  1309. /*
  1310. * STP timing alert. There are three causes:
  1311. * 1) timing status change
  1312. * 2) link availability change
  1313. * 3) time control parameter change
  1314. * In all three cases we are only interested in the clock source state.
  1315. * If a STP clock source is now available use it.
  1316. */
  1317. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1318. {
  1319. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1320. queue_work(time_sync_wq, &stp_work);
  1321. }
  1322. /*
  1323. * STP sync check machine check. This is called when the timing state
  1324. * changes from the synchronized state to the unsynchronized state.
  1325. * After a STP sync check the clock is not in sync. The machine check
  1326. * is broadcasted to all cpus at the same time.
  1327. */
  1328. void stp_sync_check(void)
  1329. {
  1330. disable_sync_clock(NULL);
  1331. queue_work(time_sync_wq, &stp_work);
  1332. }
  1333. /*
  1334. * STP island condition machine check. This is called when an attached
  1335. * server attempts to communicate over an STP link and the servers
  1336. * have matching CTN ids and have a valid stratum-1 configuration
  1337. * but the configurations do not match.
  1338. */
  1339. void stp_island_check(void)
  1340. {
  1341. disable_sync_clock(NULL);
  1342. queue_work(time_sync_wq, &stp_work);
  1343. }
  1344. static int stp_sync_clock(void *data)
  1345. {
  1346. static int first;
  1347. unsigned long long old_clock, delta;
  1348. struct clock_sync_data *stp_sync;
  1349. int rc;
  1350. stp_sync = data;
  1351. if (xchg(&first, 1) == 1) {
  1352. /* Slave */
  1353. clock_sync_cpu(stp_sync);
  1354. return 0;
  1355. }
  1356. /* Wait until all other cpus entered the sync function. */
  1357. while (atomic_read(&stp_sync->cpus) != 0)
  1358. cpu_relax();
  1359. enable_sync_clock();
  1360. rc = 0;
  1361. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1362. stp_info.todoff[2] || stp_info.todoff[3] ||
  1363. stp_info.tmd != 2) {
  1364. old_clock = get_clock();
  1365. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1366. if (rc == 0) {
  1367. delta = adjust_time(old_clock, get_clock(), 0);
  1368. fixup_clock_comparator(delta);
  1369. rc = chsc_sstpi(stp_page, &stp_info,
  1370. sizeof(struct stp_sstpi));
  1371. if (rc == 0 && stp_info.tmd != 2)
  1372. rc = -EAGAIN;
  1373. }
  1374. }
  1375. if (rc) {
  1376. disable_sync_clock(NULL);
  1377. stp_sync->in_sync = -EAGAIN;
  1378. } else
  1379. stp_sync->in_sync = 1;
  1380. xchg(&first, 0);
  1381. return 0;
  1382. }
  1383. /*
  1384. * STP work. Check for the STP state and take over the clock
  1385. * synchronization if the STP clock source is usable.
  1386. */
  1387. static void stp_work_fn(struct work_struct *work)
  1388. {
  1389. struct clock_sync_data stp_sync;
  1390. int rc;
  1391. /* prevent multiple execution. */
  1392. mutex_lock(&stp_work_mutex);
  1393. if (!stp_online) {
  1394. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1395. del_timer_sync(&stp_timer);
  1396. goto out_unlock;
  1397. }
  1398. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1399. if (rc)
  1400. goto out_unlock;
  1401. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1402. if (rc || stp_info.c == 0)
  1403. goto out_unlock;
  1404. /* Skip synchronization if the clock is already in sync. */
  1405. if (check_sync_clock())
  1406. goto out_unlock;
  1407. memset(&stp_sync, 0, sizeof(stp_sync));
  1408. get_online_cpus();
  1409. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1410. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1411. put_online_cpus();
  1412. if (!check_sync_clock())
  1413. /*
  1414. * There is a usable clock but the synchonization failed.
  1415. * Retry after a second.
  1416. */
  1417. mod_timer(&stp_timer, jiffies + HZ);
  1418. out_unlock:
  1419. mutex_unlock(&stp_work_mutex);
  1420. }
  1421. /*
  1422. * STP subsys sysfs interface functions
  1423. */
  1424. static struct bus_type stp_subsys = {
  1425. .name = "stp",
  1426. .dev_name = "stp",
  1427. };
  1428. static ssize_t stp_ctn_id_show(struct device *dev,
  1429. struct device_attribute *attr,
  1430. char *buf)
  1431. {
  1432. if (!stp_online)
  1433. return -ENODATA;
  1434. return sprintf(buf, "%016llx\n",
  1435. *(unsigned long long *) stp_info.ctnid);
  1436. }
  1437. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1438. static ssize_t stp_ctn_type_show(struct device *dev,
  1439. struct device_attribute *attr,
  1440. char *buf)
  1441. {
  1442. if (!stp_online)
  1443. return -ENODATA;
  1444. return sprintf(buf, "%i\n", stp_info.ctn);
  1445. }
  1446. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1447. static ssize_t stp_dst_offset_show(struct device *dev,
  1448. struct device_attribute *attr,
  1449. char *buf)
  1450. {
  1451. if (!stp_online || !(stp_info.vbits & 0x2000))
  1452. return -ENODATA;
  1453. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1454. }
  1455. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1456. static ssize_t stp_leap_seconds_show(struct device *dev,
  1457. struct device_attribute *attr,
  1458. char *buf)
  1459. {
  1460. if (!stp_online || !(stp_info.vbits & 0x8000))
  1461. return -ENODATA;
  1462. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1463. }
  1464. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1465. static ssize_t stp_stratum_show(struct device *dev,
  1466. struct device_attribute *attr,
  1467. char *buf)
  1468. {
  1469. if (!stp_online)
  1470. return -ENODATA;
  1471. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1472. }
  1473. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1474. static ssize_t stp_time_offset_show(struct device *dev,
  1475. struct device_attribute *attr,
  1476. char *buf)
  1477. {
  1478. if (!stp_online || !(stp_info.vbits & 0x0800))
  1479. return -ENODATA;
  1480. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1481. }
  1482. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1483. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1484. struct device_attribute *attr,
  1485. char *buf)
  1486. {
  1487. if (!stp_online || !(stp_info.vbits & 0x4000))
  1488. return -ENODATA;
  1489. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1490. }
  1491. static DEVICE_ATTR(time_zone_offset, 0400,
  1492. stp_time_zone_offset_show, NULL);
  1493. static ssize_t stp_timing_mode_show(struct device *dev,
  1494. struct device_attribute *attr,
  1495. char *buf)
  1496. {
  1497. if (!stp_online)
  1498. return -ENODATA;
  1499. return sprintf(buf, "%i\n", stp_info.tmd);
  1500. }
  1501. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1502. static ssize_t stp_timing_state_show(struct device *dev,
  1503. struct device_attribute *attr,
  1504. char *buf)
  1505. {
  1506. if (!stp_online)
  1507. return -ENODATA;
  1508. return sprintf(buf, "%i\n", stp_info.tst);
  1509. }
  1510. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1511. static ssize_t stp_online_show(struct device *dev,
  1512. struct device_attribute *attr,
  1513. char *buf)
  1514. {
  1515. return sprintf(buf, "%i\n", stp_online);
  1516. }
  1517. static ssize_t stp_online_store(struct device *dev,
  1518. struct device_attribute *attr,
  1519. const char *buf, size_t count)
  1520. {
  1521. unsigned int value;
  1522. value = simple_strtoul(buf, NULL, 0);
  1523. if (value != 0 && value != 1)
  1524. return -EINVAL;
  1525. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1526. return -EOPNOTSUPP;
  1527. mutex_lock(&clock_sync_mutex);
  1528. stp_online = value;
  1529. if (stp_online)
  1530. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1531. else
  1532. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1533. queue_work(time_sync_wq, &stp_work);
  1534. mutex_unlock(&clock_sync_mutex);
  1535. return count;
  1536. }
  1537. /*
  1538. * Can't use DEVICE_ATTR because the attribute should be named
  1539. * stp/online but dev_attr_online already exists in this file ..
  1540. */
  1541. static struct device_attribute dev_attr_stp_online = {
  1542. .attr = { .name = "online", .mode = 0600 },
  1543. .show = stp_online_show,
  1544. .store = stp_online_store,
  1545. };
  1546. static struct device_attribute *stp_attributes[] = {
  1547. &dev_attr_ctn_id,
  1548. &dev_attr_ctn_type,
  1549. &dev_attr_dst_offset,
  1550. &dev_attr_leap_seconds,
  1551. &dev_attr_stp_online,
  1552. &dev_attr_stratum,
  1553. &dev_attr_time_offset,
  1554. &dev_attr_time_zone_offset,
  1555. &dev_attr_timing_mode,
  1556. &dev_attr_timing_state,
  1557. NULL
  1558. };
  1559. static int __init stp_init_sysfs(void)
  1560. {
  1561. struct device_attribute **attr;
  1562. int rc;
  1563. rc = subsys_system_register(&stp_subsys, NULL);
  1564. if (rc)
  1565. goto out;
  1566. for (attr = stp_attributes; *attr; attr++) {
  1567. rc = device_create_file(stp_subsys.dev_root, *attr);
  1568. if (rc)
  1569. goto out_unreg;
  1570. }
  1571. return 0;
  1572. out_unreg:
  1573. for (; attr >= stp_attributes; attr--)
  1574. device_remove_file(stp_subsys.dev_root, *attr);
  1575. bus_unregister(&stp_subsys);
  1576. out:
  1577. return rc;
  1578. }
  1579. device_initcall(stp_init_sysfs);