s3c2410-cpufreq-utils.c 1.7 KB

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  1. /* linux/arch/arm/plat-s3c24xx/s3c2410-cpufreq-utils.c
  2. *
  3. * Copyright (c) 2009 Simtec Electronics
  4. * http://armlinux.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/cpufreq.h>
  16. #include <linux/io.h>
  17. #include <mach/map.h>
  18. #include <mach/regs-mem.h>
  19. #include <mach/regs-clock.h>
  20. #include <plat/cpu-freq-core.h>
  21. /**
  22. * s3c2410_cpufreq_setrefresh - set SDRAM refresh value
  23. * @cfg: The frequency configuration
  24. *
  25. * Set the SDRAM refresh value appropriately for the configured
  26. * frequency.
  27. */
  28. void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
  29. {
  30. struct s3c_cpufreq_board *board = cfg->board;
  31. unsigned long refresh;
  32. unsigned long refval;
  33. /* Reduce both the refresh time (in ns) and the frequency (in MHz)
  34. * down to ensure that we do not overflow 32 bit numbers.
  35. *
  36. * This should work for HCLK up to 133MHz and refresh period up
  37. * to 30usec.
  38. */
  39. refresh = (cfg->freq.hclk / 100) * (board->refresh / 10);
  40. refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */
  41. refresh = (1 << 11) + 1 - refresh;
  42. s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh);
  43. refval = __raw_readl(S3C2410_REFRESH);
  44. refval &= ~((1 << 12) - 1);
  45. refval |= refresh;
  46. __raw_writel(refval, S3C2410_REFRESH);
  47. }
  48. /**
  49. * s3c2410_set_fvco - set the PLL value
  50. * @cfg: The frequency configuration
  51. */
  52. void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
  53. {
  54. __raw_writel(cfg->pll.index, S3C2410_MPLLCON);
  55. }