board-mackerel.c 38 KB

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  1. /*
  2. * mackerel board support
  3. *
  4. * Copyright (C) 2010 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * based on ap4evb
  8. * Copyright (C) 2010 Magnus Damm
  9. * Copyright (C) 2008 Yoshihiro Shimoda
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; version 2 of the License.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  23. */
  24. #include <linux/delay.h>
  25. #include <linux/kernel.h>
  26. #include <linux/init.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irq.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/gpio.h>
  31. #include <linux/input.h>
  32. #include <linux/io.h>
  33. #include <linux/i2c.h>
  34. #include <linux/leds.h>
  35. #include <linux/mfd/tmio.h>
  36. #include <linux/mmc/host.h>
  37. #include <linux/mmc/sh_mmcif.h>
  38. #include <linux/mmc/sh_mobile_sdhi.h>
  39. #include <linux/mtd/mtd.h>
  40. #include <linux/mtd/partitions.h>
  41. #include <linux/mtd/physmap.h>
  42. #include <linux/mtd/sh_flctl.h>
  43. #include <linux/pm_clock.h>
  44. #include <linux/smsc911x.h>
  45. #include <linux/sh_intc.h>
  46. #include <linux/tca6416_keypad.h>
  47. #include <linux/usb/renesas_usbhs.h>
  48. #include <linux/dma-mapping.h>
  49. #include <video/sh_mobile_hdmi.h>
  50. #include <video/sh_mobile_lcdc.h>
  51. #include <media/sh_mobile_ceu.h>
  52. #include <media/soc_camera.h>
  53. #include <media/soc_camera_platform.h>
  54. #include <sound/sh_fsi.h>
  55. #include <mach/common.h>
  56. #include <mach/irqs.h>
  57. #include <mach/sh7372.h>
  58. #include <asm/mach/arch.h>
  59. #include <asm/mach-types.h>
  60. /*
  61. * Address Interface BusWidth note
  62. * ------------------------------------------------------------------
  63. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  64. * 0x0800_0000 user area -
  65. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  66. * 0x1400_0000 Ether (LAN9220) 16bit
  67. * 0x1600_0000 user area - cannot use with NAND
  68. * 0x1800_0000 user area -
  69. * 0x1A00_0000 -
  70. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  71. */
  72. /*
  73. * CPU mode
  74. *
  75. * SW4 | Boot Area| Master | Remarks
  76. * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
  77. * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
  78. * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
  79. * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
  80. * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
  81. * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
  82. * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
  83. * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
  84. * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
  85. * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
  86. */
  87. /*
  88. * NOR Flash ROM
  89. *
  90. * SW1 | SW2 | SW7 | NOR Flash ROM
  91. * bit1 | bit1 bit2 | bit1 | Memory allocation
  92. * ------+------------+------+------------------
  93. * OFF | ON OFF | ON | Area 0
  94. * OFF | ON OFF | OFF | Area 4
  95. */
  96. /*
  97. * SMSC 9220
  98. *
  99. * SW1 SMSC 9220
  100. * -----------------------
  101. * ON access disable
  102. * OFF access enable
  103. */
  104. /*
  105. * NAND Flash ROM
  106. *
  107. * SW1 | SW2 | SW7 | NAND Flash ROM
  108. * bit1 | bit1 bit2 | bit2 | Memory allocation
  109. * ------+------------+------+------------------
  110. * OFF | ON OFF | ON | FCE 0
  111. * OFF | ON OFF | OFF | FCE 1
  112. */
  113. /*
  114. * External interrupt pin settings
  115. *
  116. * IRQX | pin setting | device | level
  117. * ------+--------------------+--------------------+-------
  118. * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
  119. * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
  120. * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
  121. * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
  122. * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
  123. * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
  124. * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
  125. */
  126. /*
  127. * USB
  128. *
  129. * USB0 : CN22 : Function
  130. * USB1 : CN31 : Function/Host *1
  131. *
  132. * J30 (for CN31) *1
  133. * ----------+---------------+-------------
  134. * 1-2 short | VBUS 5V | Host
  135. * open | external VBUS | Function
  136. *
  137. * CAUTION
  138. *
  139. * renesas_usbhs driver can use external interrupt mode
  140. * (which come from USB-PHY) or autonomy mode (it use own interrupt)
  141. * for detecting connection/disconnection when Function.
  142. * USB will be power OFF while it has been disconnecting
  143. * if external interrupt mode, and it is always power ON if autonomy mode,
  144. *
  145. * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
  146. * because Touchscreen is using IRQ7-PORT40.
  147. * It is impossible to use IRQ7 demux on this board.
  148. */
  149. /*
  150. * SDHI0 (CN12)
  151. *
  152. * SW56 : OFF
  153. *
  154. */
  155. /* MMC /SDHI1 (CN7)
  156. *
  157. * I/O voltage : 1.8v
  158. *
  159. * Power voltage : 1.8v or 3.3v
  160. * J22 : select power voltage *1
  161. * 1-2 pin : 1.8v
  162. * 2-3 pin : 3.3v
  163. *
  164. * *1
  165. * Please change J22 depends the card to be used.
  166. * MMC's OCR field set to support either voltage for the card inserted.
  167. *
  168. * SW1 | SW33
  169. * | bit1 | bit2 | bit3 | bit4
  170. * -------------+------+------+------+-------
  171. * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
  172. * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
  173. *
  174. */
  175. /*
  176. * SDHI2 (CN23)
  177. *
  178. * microSD card sloct
  179. *
  180. */
  181. /*
  182. * FSI - AK4642
  183. *
  184. * it needs amixer settings for playing
  185. *
  186. * amixer set "Headphone" on
  187. * amixer set "HPOUTL Mixer DACH" on
  188. * amixer set "HPOUTR Mixer DACH" on
  189. */
  190. /*
  191. * FIXME !!
  192. *
  193. * gpio_no_direction
  194. * gpio_pull_down
  195. * are quick_hack.
  196. *
  197. * current gpio frame work doesn't have
  198. * the method to control only pull up/down/free.
  199. * this function should be replaced by correct gpio function
  200. */
  201. static void __init gpio_no_direction(u32 addr)
  202. {
  203. __raw_writeb(0x00, addr);
  204. }
  205. static void __init gpio_pull_down(u32 addr)
  206. {
  207. u8 data = __raw_readb(addr);
  208. data &= 0x0F;
  209. data |= 0xA0;
  210. __raw_writeb(data, addr);
  211. }
  212. /* MTD */
  213. static struct mtd_partition nor_flash_partitions[] = {
  214. {
  215. .name = "loader",
  216. .offset = 0x00000000,
  217. .size = 512 * 1024,
  218. .mask_flags = MTD_WRITEABLE,
  219. },
  220. {
  221. .name = "bootenv",
  222. .offset = MTDPART_OFS_APPEND,
  223. .size = 512 * 1024,
  224. .mask_flags = MTD_WRITEABLE,
  225. },
  226. {
  227. .name = "kernel_ro",
  228. .offset = MTDPART_OFS_APPEND,
  229. .size = 8 * 1024 * 1024,
  230. .mask_flags = MTD_WRITEABLE,
  231. },
  232. {
  233. .name = "kernel",
  234. .offset = MTDPART_OFS_APPEND,
  235. .size = 8 * 1024 * 1024,
  236. },
  237. {
  238. .name = "data",
  239. .offset = MTDPART_OFS_APPEND,
  240. .size = MTDPART_SIZ_FULL,
  241. },
  242. };
  243. static struct physmap_flash_data nor_flash_data = {
  244. .width = 2,
  245. .parts = nor_flash_partitions,
  246. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  247. };
  248. static struct resource nor_flash_resources[] = {
  249. [0] = {
  250. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  251. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  252. .flags = IORESOURCE_MEM,
  253. }
  254. };
  255. static struct platform_device nor_flash_device = {
  256. .name = "physmap-flash",
  257. .dev = {
  258. .platform_data = &nor_flash_data,
  259. },
  260. .num_resources = ARRAY_SIZE(nor_flash_resources),
  261. .resource = nor_flash_resources,
  262. };
  263. /* SMSC */
  264. static struct resource smc911x_resources[] = {
  265. {
  266. .start = 0x14000000,
  267. .end = 0x16000000 - 1,
  268. .flags = IORESOURCE_MEM,
  269. }, {
  270. .start = evt2irq(0x02c0) /* IRQ6A */,
  271. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  272. },
  273. };
  274. static struct smsc911x_platform_config smsc911x_info = {
  275. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  276. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  277. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  278. };
  279. static struct platform_device smc911x_device = {
  280. .name = "smsc911x",
  281. .id = -1,
  282. .num_resources = ARRAY_SIZE(smc911x_resources),
  283. .resource = smc911x_resources,
  284. .dev = {
  285. .platform_data = &smsc911x_info,
  286. },
  287. };
  288. /* MERAM */
  289. static struct sh_mobile_meram_info mackerel_meram_info = {
  290. .addr_mode = SH_MOBILE_MERAM_MODE1,
  291. };
  292. static struct resource meram_resources[] = {
  293. [0] = {
  294. .name = "regs",
  295. .start = 0xe8000000,
  296. .end = 0xe807ffff,
  297. .flags = IORESOURCE_MEM,
  298. },
  299. [1] = {
  300. .name = "meram",
  301. .start = 0xe8080000,
  302. .end = 0xe81fffff,
  303. .flags = IORESOURCE_MEM,
  304. },
  305. };
  306. static struct platform_device meram_device = {
  307. .name = "sh_mobile_meram",
  308. .id = 0,
  309. .num_resources = ARRAY_SIZE(meram_resources),
  310. .resource = meram_resources,
  311. .dev = {
  312. .platform_data = &mackerel_meram_info,
  313. },
  314. };
  315. /* LCDC */
  316. static struct fb_videomode mackerel_lcdc_modes[] = {
  317. {
  318. .name = "WVGA Panel",
  319. .xres = 800,
  320. .yres = 480,
  321. .left_margin = 220,
  322. .right_margin = 110,
  323. .hsync_len = 70,
  324. .upper_margin = 20,
  325. .lower_margin = 5,
  326. .vsync_len = 5,
  327. .sync = 0,
  328. },
  329. };
  330. static int mackerel_set_brightness(int brightness)
  331. {
  332. gpio_set_value(GPIO_PORT31, brightness);
  333. return 0;
  334. }
  335. static int mackerel_get_brightness(void)
  336. {
  337. return gpio_get_value(GPIO_PORT31);
  338. }
  339. static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
  340. .icb[0] = {
  341. .meram_size = 0x40,
  342. },
  343. .icb[1] = {
  344. .meram_size = 0x40,
  345. },
  346. };
  347. static struct sh_mobile_lcdc_info lcdc_info = {
  348. .meram_dev = &mackerel_meram_info,
  349. .clock_source = LCDC_CLK_BUS,
  350. .ch[0] = {
  351. .chan = LCDC_CHAN_MAINLCD,
  352. .fourcc = V4L2_PIX_FMT_RGB565,
  353. .lcd_modes = mackerel_lcdc_modes,
  354. .num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
  355. .interface_type = RGB24,
  356. .clock_divider = 3,
  357. .flags = 0,
  358. .panel_cfg = {
  359. .width = 152,
  360. .height = 91,
  361. },
  362. .bl_info = {
  363. .name = "sh_mobile_lcdc_bl",
  364. .max_brightness = 1,
  365. .set_brightness = mackerel_set_brightness,
  366. .get_brightness = mackerel_get_brightness,
  367. },
  368. .meram_cfg = &lcd_meram_cfg,
  369. }
  370. };
  371. static struct resource lcdc_resources[] = {
  372. [0] = {
  373. .name = "LCDC",
  374. .start = 0xfe940000,
  375. .end = 0xfe943fff,
  376. .flags = IORESOURCE_MEM,
  377. },
  378. [1] = {
  379. .start = intcs_evt2irq(0x580),
  380. .flags = IORESOURCE_IRQ,
  381. },
  382. };
  383. static struct platform_device lcdc_device = {
  384. .name = "sh_mobile_lcdc_fb",
  385. .num_resources = ARRAY_SIZE(lcdc_resources),
  386. .resource = lcdc_resources,
  387. .dev = {
  388. .platform_data = &lcdc_info,
  389. .coherent_dma_mask = DMA_BIT_MASK(32),
  390. },
  391. };
  392. /* HDMI */
  393. static struct sh_mobile_hdmi_info hdmi_info = {
  394. .flags = HDMI_SND_SRC_SPDIF,
  395. };
  396. static struct resource hdmi_resources[] = {
  397. [0] = {
  398. .name = "HDMI",
  399. .start = 0xe6be0000,
  400. .end = 0xe6be00ff,
  401. .flags = IORESOURCE_MEM,
  402. },
  403. [1] = {
  404. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  405. .start = evt2irq(0x17e0),
  406. .flags = IORESOURCE_IRQ,
  407. },
  408. };
  409. static struct platform_device hdmi_device = {
  410. .name = "sh-mobile-hdmi",
  411. .num_resources = ARRAY_SIZE(hdmi_resources),
  412. .resource = hdmi_resources,
  413. .id = -1,
  414. .dev = {
  415. .platform_data = &hdmi_info,
  416. },
  417. };
  418. static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  419. .icb[0] = {
  420. .meram_size = 0x100,
  421. },
  422. .icb[1] = {
  423. .meram_size = 0x100,
  424. },
  425. };
  426. static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
  427. .meram_dev = &mackerel_meram_info,
  428. .clock_source = LCDC_CLK_EXTERNAL,
  429. .ch[0] = {
  430. .chan = LCDC_CHAN_MAINLCD,
  431. .fourcc = V4L2_PIX_FMT_RGB565,
  432. .interface_type = RGB24,
  433. .clock_divider = 1,
  434. .flags = LCDC_FLAGS_DWPOL,
  435. .meram_cfg = &hdmi_meram_cfg,
  436. .tx_dev = &hdmi_device,
  437. }
  438. };
  439. static struct resource hdmi_lcdc_resources[] = {
  440. [0] = {
  441. .name = "LCDC1",
  442. .start = 0xfe944000,
  443. .end = 0xfe947fff,
  444. .flags = IORESOURCE_MEM,
  445. },
  446. [1] = {
  447. .start = intcs_evt2irq(0x1780),
  448. .flags = IORESOURCE_IRQ,
  449. },
  450. };
  451. static struct platform_device hdmi_lcdc_device = {
  452. .name = "sh_mobile_lcdc_fb",
  453. .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
  454. .resource = hdmi_lcdc_resources,
  455. .id = 1,
  456. .dev = {
  457. .platform_data = &hdmi_lcdc_info,
  458. .coherent_dma_mask = DMA_BIT_MASK(32),
  459. },
  460. };
  461. static struct platform_device fsi_hdmi_device = {
  462. .name = "sh_fsi2_b_hdmi",
  463. };
  464. static void __init hdmi_init_pm_clock(void)
  465. {
  466. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  467. int ret;
  468. long rate;
  469. if (IS_ERR(hdmi_ick)) {
  470. ret = PTR_ERR(hdmi_ick);
  471. pr_err("Cannot get HDMI ICK: %d\n", ret);
  472. goto out;
  473. }
  474. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  475. if (ret < 0) {
  476. pr_err("Cannot set PLLC2 parent: %d, %d users\n",
  477. ret, sh7372_pllc2_clk.usecount);
  478. goto out;
  479. }
  480. pr_debug("PLLC2 initial frequency %lu\n",
  481. clk_get_rate(&sh7372_pllc2_clk));
  482. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  483. if (rate < 0) {
  484. pr_err("Cannot get suitable rate: %ld\n", rate);
  485. ret = rate;
  486. goto out;
  487. }
  488. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  489. if (ret < 0) {
  490. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  491. goto out;
  492. }
  493. pr_debug("PLLC2 set frequency %lu\n", rate);
  494. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  495. if (ret < 0)
  496. pr_err("Cannot set HDMI parent: %d\n", ret);
  497. out:
  498. if (!IS_ERR(hdmi_ick))
  499. clk_put(hdmi_ick);
  500. }
  501. /* USBHS0 is connected to CN22 which takes a USB Mini-B plug
  502. *
  503. * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
  504. * but on this particular board IRQ7 is already used by
  505. * the touch screen. This leaves us with software polling.
  506. */
  507. #define USBHS0_POLL_INTERVAL (HZ * 5)
  508. struct usbhs_private {
  509. unsigned int usbphyaddr;
  510. unsigned int usbcrcaddr;
  511. struct renesas_usbhs_platform_info info;
  512. struct delayed_work work;
  513. struct platform_device *pdev;
  514. };
  515. #define usbhs_get_priv(pdev) \
  516. container_of(renesas_usbhs_get_info(pdev), \
  517. struct usbhs_private, info)
  518. #define usbhs_is_connected(priv) \
  519. (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
  520. static int usbhs_get_vbus(struct platform_device *pdev)
  521. {
  522. return usbhs_is_connected(usbhs_get_priv(pdev));
  523. }
  524. static void usbhs_phy_reset(struct platform_device *pdev)
  525. {
  526. struct usbhs_private *priv = usbhs_get_priv(pdev);
  527. /* init phy */
  528. __raw_writew(0x8a0a, priv->usbcrcaddr);
  529. }
  530. static int usbhs0_get_id(struct platform_device *pdev)
  531. {
  532. return USBHS_GADGET;
  533. }
  534. static void usbhs0_work_function(struct work_struct *work)
  535. {
  536. struct usbhs_private *priv = container_of(work, struct usbhs_private,
  537. work.work);
  538. renesas_usbhs_call_notify_hotplug(priv->pdev);
  539. schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
  540. }
  541. static int usbhs0_hardware_init(struct platform_device *pdev)
  542. {
  543. struct usbhs_private *priv = usbhs_get_priv(pdev);
  544. priv->pdev = pdev;
  545. INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
  546. schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
  547. return 0;
  548. }
  549. static void usbhs0_hardware_exit(struct platform_device *pdev)
  550. {
  551. struct usbhs_private *priv = usbhs_get_priv(pdev);
  552. cancel_delayed_work_sync(&priv->work);
  553. }
  554. static struct usbhs_private usbhs0_private = {
  555. .usbcrcaddr = 0xe605810c, /* USBCR2 */
  556. .info = {
  557. .platform_callback = {
  558. .hardware_init = usbhs0_hardware_init,
  559. .hardware_exit = usbhs0_hardware_exit,
  560. .phy_reset = usbhs_phy_reset,
  561. .get_id = usbhs0_get_id,
  562. .get_vbus = usbhs_get_vbus,
  563. },
  564. .driver_param = {
  565. .buswait_bwait = 4,
  566. .d0_tx_id = SHDMA_SLAVE_USB0_TX,
  567. .d1_rx_id = SHDMA_SLAVE_USB0_RX,
  568. },
  569. },
  570. };
  571. static struct resource usbhs0_resources[] = {
  572. [0] = {
  573. .name = "USBHS0",
  574. .start = 0xe6890000,
  575. .end = 0xe68900e6 - 1,
  576. .flags = IORESOURCE_MEM,
  577. },
  578. [1] = {
  579. .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
  580. .flags = IORESOURCE_IRQ,
  581. },
  582. };
  583. static struct platform_device usbhs0_device = {
  584. .name = "renesas_usbhs",
  585. .id = 0,
  586. .dev = {
  587. .platform_data = &usbhs0_private.info,
  588. },
  589. .num_resources = ARRAY_SIZE(usbhs0_resources),
  590. .resource = usbhs0_resources,
  591. };
  592. /* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
  593. *
  594. * Use J30 to select between Host and Function. This setting
  595. * can however not be detected by software. Hotplug of USBHS1
  596. * is provided via IRQ8.
  597. *
  598. * Current USB1 works as "USB Host".
  599. * - set J30 "short"
  600. *
  601. * If you want to use it as "USB gadget",
  602. * - J30 "open"
  603. * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
  604. * - add .get_vbus = usbhs_get_vbus in usbhs1_private
  605. */
  606. #define IRQ8 evt2irq(0x0300)
  607. #define USB_PHY_MODE (1 << 4)
  608. #define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
  609. #define USB_PHY_ON (1 << 1)
  610. #define USB_PHY_OFF (1 << 0)
  611. #define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
  612. static irqreturn_t usbhs1_interrupt(int irq, void *data)
  613. {
  614. struct platform_device *pdev = data;
  615. struct usbhs_private *priv = usbhs_get_priv(pdev);
  616. dev_dbg(&pdev->dev, "%s\n", __func__);
  617. renesas_usbhs_call_notify_hotplug(pdev);
  618. /* clear status */
  619. __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
  620. priv->usbphyaddr);
  621. return IRQ_HANDLED;
  622. }
  623. static int usbhs1_hardware_init(struct platform_device *pdev)
  624. {
  625. struct usbhs_private *priv = usbhs_get_priv(pdev);
  626. int ret;
  627. /* clear interrupt status */
  628. __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
  629. ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
  630. dev_name(&pdev->dev), pdev);
  631. if (ret) {
  632. dev_err(&pdev->dev, "request_irq err\n");
  633. return ret;
  634. }
  635. /* enable USB phy interrupt */
  636. __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
  637. return 0;
  638. }
  639. static void usbhs1_hardware_exit(struct platform_device *pdev)
  640. {
  641. struct usbhs_private *priv = usbhs_get_priv(pdev);
  642. /* clear interrupt status */
  643. __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
  644. free_irq(IRQ8, pdev);
  645. }
  646. static int usbhs1_get_id(struct platform_device *pdev)
  647. {
  648. return USBHS_HOST;
  649. }
  650. static u32 usbhs1_pipe_cfg[] = {
  651. USB_ENDPOINT_XFER_CONTROL,
  652. USB_ENDPOINT_XFER_ISOC,
  653. USB_ENDPOINT_XFER_ISOC,
  654. USB_ENDPOINT_XFER_BULK,
  655. USB_ENDPOINT_XFER_BULK,
  656. USB_ENDPOINT_XFER_BULK,
  657. USB_ENDPOINT_XFER_INT,
  658. USB_ENDPOINT_XFER_INT,
  659. USB_ENDPOINT_XFER_INT,
  660. USB_ENDPOINT_XFER_BULK,
  661. USB_ENDPOINT_XFER_BULK,
  662. USB_ENDPOINT_XFER_BULK,
  663. USB_ENDPOINT_XFER_BULK,
  664. USB_ENDPOINT_XFER_BULK,
  665. USB_ENDPOINT_XFER_BULK,
  666. USB_ENDPOINT_XFER_BULK,
  667. };
  668. static struct usbhs_private usbhs1_private = {
  669. .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */
  670. .usbcrcaddr = 0xe6058130, /* USBCR4 */
  671. .info = {
  672. .platform_callback = {
  673. .hardware_init = usbhs1_hardware_init,
  674. .hardware_exit = usbhs1_hardware_exit,
  675. .get_id = usbhs1_get_id,
  676. .phy_reset = usbhs_phy_reset,
  677. },
  678. .driver_param = {
  679. .buswait_bwait = 4,
  680. .has_otg = 1,
  681. .pipe_type = usbhs1_pipe_cfg,
  682. .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
  683. .d0_tx_id = SHDMA_SLAVE_USB1_TX,
  684. .d1_rx_id = SHDMA_SLAVE_USB1_RX,
  685. },
  686. },
  687. };
  688. static struct resource usbhs1_resources[] = {
  689. [0] = {
  690. .name = "USBHS1",
  691. .start = 0xe68b0000,
  692. .end = 0xe68b00e6 - 1,
  693. .flags = IORESOURCE_MEM,
  694. },
  695. [1] = {
  696. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  697. .flags = IORESOURCE_IRQ,
  698. },
  699. };
  700. static struct platform_device usbhs1_device = {
  701. .name = "renesas_usbhs",
  702. .id = 1,
  703. .dev = {
  704. .platform_data = &usbhs1_private.info,
  705. },
  706. .num_resources = ARRAY_SIZE(usbhs1_resources),
  707. .resource = usbhs1_resources,
  708. };
  709. /* LED */
  710. static struct gpio_led mackerel_leds[] = {
  711. {
  712. .name = "led0",
  713. .gpio = GPIO_PORT0,
  714. .default_state = LEDS_GPIO_DEFSTATE_ON,
  715. },
  716. {
  717. .name = "led1",
  718. .gpio = GPIO_PORT1,
  719. .default_state = LEDS_GPIO_DEFSTATE_ON,
  720. },
  721. {
  722. .name = "led2",
  723. .gpio = GPIO_PORT2,
  724. .default_state = LEDS_GPIO_DEFSTATE_ON,
  725. },
  726. {
  727. .name = "led3",
  728. .gpio = GPIO_PORT159,
  729. .default_state = LEDS_GPIO_DEFSTATE_ON,
  730. }
  731. };
  732. static struct gpio_led_platform_data mackerel_leds_pdata = {
  733. .leds = mackerel_leds,
  734. .num_leds = ARRAY_SIZE(mackerel_leds),
  735. };
  736. static struct platform_device leds_device = {
  737. .name = "leds-gpio",
  738. .id = 0,
  739. .dev = {
  740. .platform_data = &mackerel_leds_pdata,
  741. },
  742. };
  743. /* FSI */
  744. #define IRQ_FSI evt2irq(0x1840)
  745. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  746. {
  747. int ret;
  748. if (rate <= 0)
  749. return 0;
  750. if (!enable) {
  751. clk_disable(clk);
  752. return 0;
  753. }
  754. ret = clk_set_rate(clk, clk_round_rate(clk, rate));
  755. if (ret < 0)
  756. return ret;
  757. return clk_enable(clk);
  758. }
  759. static int fsi_b_set_rate(struct device *dev, int rate, int enable)
  760. {
  761. struct clk *fsib_clk;
  762. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  763. long fsib_rate = 0;
  764. long fdiv_rate = 0;
  765. int ackmd_bpfmd;
  766. int ret;
  767. /* clock start */
  768. switch (rate) {
  769. case 44100:
  770. fsib_rate = rate * 256;
  771. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  772. break;
  773. case 48000:
  774. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  775. fdiv_rate = rate * 256;
  776. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  777. break;
  778. default:
  779. pr_err("unsupported rate in FSI2 port B\n");
  780. return -EINVAL;
  781. }
  782. /* FSI B setting */
  783. fsib_clk = clk_get(dev, "ickb");
  784. if (IS_ERR(fsib_clk))
  785. return -EIO;
  786. /* fsib */
  787. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  788. if (ret < 0)
  789. goto fsi_set_rate_end;
  790. /* FSI DIV */
  791. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  792. if (ret < 0) {
  793. /* disable FSI B */
  794. if (enable)
  795. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  796. goto fsi_set_rate_end;
  797. }
  798. ret = ackmd_bpfmd;
  799. fsi_set_rate_end:
  800. clk_put(fsib_clk);
  801. return ret;
  802. }
  803. static struct sh_fsi_platform_info fsi_info = {
  804. .port_a = {
  805. .flags = SH_FSI_BRS_INV,
  806. },
  807. .port_b = {
  808. .flags = SH_FSI_BRS_INV |
  809. SH_FSI_BRM_INV |
  810. SH_FSI_LRS_INV |
  811. SH_FSI_FMT_SPDIF,
  812. .set_rate = fsi_b_set_rate,
  813. }
  814. };
  815. static struct resource fsi_resources[] = {
  816. [0] = {
  817. .name = "FSI",
  818. .start = 0xFE3C0000,
  819. .end = 0xFE3C0400 - 1,
  820. .flags = IORESOURCE_MEM,
  821. },
  822. [1] = {
  823. .start = IRQ_FSI,
  824. .flags = IORESOURCE_IRQ,
  825. },
  826. };
  827. static struct platform_device fsi_device = {
  828. .name = "sh_fsi2",
  829. .id = -1,
  830. .num_resources = ARRAY_SIZE(fsi_resources),
  831. .resource = fsi_resources,
  832. .dev = {
  833. .platform_data = &fsi_info,
  834. },
  835. };
  836. static struct fsi_ak4642_info fsi2_ak4643_info = {
  837. .name = "AK4643",
  838. .card = "FSI2A-AK4643",
  839. .cpu_dai = "fsia-dai",
  840. .codec = "ak4642-codec.0-0013",
  841. .platform = "sh_fsi2",
  842. .id = FSI_PORT_A,
  843. };
  844. static struct platform_device fsi_ak4643_device = {
  845. .name = "fsi-ak4642-audio",
  846. .dev = {
  847. .platform_data = &fsi2_ak4643_info,
  848. },
  849. };
  850. /* FLCTL */
  851. static struct mtd_partition nand_partition_info[] = {
  852. {
  853. .name = "system",
  854. .offset = 0,
  855. .size = 128 * 1024 * 1024,
  856. },
  857. {
  858. .name = "userdata",
  859. .offset = MTDPART_OFS_APPEND,
  860. .size = 256 * 1024 * 1024,
  861. },
  862. {
  863. .name = "cache",
  864. .offset = MTDPART_OFS_APPEND,
  865. .size = 128 * 1024 * 1024,
  866. },
  867. };
  868. static struct resource nand_flash_resources[] = {
  869. [0] = {
  870. .start = 0xe6a30000,
  871. .end = 0xe6a3009b,
  872. .flags = IORESOURCE_MEM,
  873. }
  874. };
  875. static struct sh_flctl_platform_data nand_flash_data = {
  876. .parts = nand_partition_info,
  877. .nr_parts = ARRAY_SIZE(nand_partition_info),
  878. .flcmncr_val = CLK_16B_12L_4H | TYPESEL_SET
  879. | SHBUSSEL | SEL_16BIT | SNAND_E,
  880. .use_holden = 1,
  881. };
  882. static struct platform_device nand_flash_device = {
  883. .name = "sh_flctl",
  884. .resource = nand_flash_resources,
  885. .num_resources = ARRAY_SIZE(nand_flash_resources),
  886. .dev = {
  887. .platform_data = &nand_flash_data,
  888. },
  889. };
  890. /*
  891. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  892. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  893. */
  894. static int slot_cn7_get_cd(struct platform_device *pdev)
  895. {
  896. return !gpio_get_value(GPIO_PORT41);
  897. }
  898. /* SDHI0 */
  899. static struct sh_mobile_sdhi_info sdhi0_info = {
  900. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  901. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  902. .tmio_flags = TMIO_MMC_USE_GPIO_CD,
  903. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
  904. .cd_gpio = GPIO_PORT172,
  905. };
  906. static struct resource sdhi0_resources[] = {
  907. [0] = {
  908. .name = "SDHI0",
  909. .start = 0xe6850000,
  910. .end = 0xe68500ff,
  911. .flags = IORESOURCE_MEM,
  912. },
  913. [1] = {
  914. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  915. .flags = IORESOURCE_IRQ,
  916. },
  917. [2] = {
  918. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  919. .flags = IORESOURCE_IRQ,
  920. },
  921. [3] = {
  922. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  923. .flags = IORESOURCE_IRQ,
  924. },
  925. };
  926. static struct platform_device sdhi0_device = {
  927. .name = "sh_mobile_sdhi",
  928. .num_resources = ARRAY_SIZE(sdhi0_resources),
  929. .resource = sdhi0_resources,
  930. .id = 0,
  931. .dev = {
  932. .platform_data = &sdhi0_info,
  933. },
  934. };
  935. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  936. /* SDHI1 */
  937. static struct sh_mobile_sdhi_info sdhi1_info = {
  938. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  939. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  940. .tmio_ocr_mask = MMC_VDD_165_195,
  941. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  942. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  943. MMC_CAP_NEEDS_POLL,
  944. .get_cd = slot_cn7_get_cd,
  945. };
  946. static struct resource sdhi1_resources[] = {
  947. [0] = {
  948. .name = "SDHI1",
  949. .start = 0xe6860000,
  950. .end = 0xe68600ff,
  951. .flags = IORESOURCE_MEM,
  952. },
  953. [1] = {
  954. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  955. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  956. .flags = IORESOURCE_IRQ,
  957. },
  958. [2] = {
  959. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  960. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  961. .flags = IORESOURCE_IRQ,
  962. },
  963. [3] = {
  964. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  965. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  966. .flags = IORESOURCE_IRQ,
  967. },
  968. };
  969. static struct platform_device sdhi1_device = {
  970. .name = "sh_mobile_sdhi",
  971. .num_resources = ARRAY_SIZE(sdhi1_resources),
  972. .resource = sdhi1_resources,
  973. .id = 1,
  974. .dev = {
  975. .platform_data = &sdhi1_info,
  976. },
  977. };
  978. #endif
  979. /*
  980. * The card detect pin of the top SD/MMC slot (CN23) is active low and is
  981. * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
  982. */
  983. static int slot_cn23_get_cd(struct platform_device *pdev)
  984. {
  985. return !gpio_get_value(GPIO_PORT162);
  986. }
  987. /* SDHI2 */
  988. static struct sh_mobile_sdhi_info sdhi2_info = {
  989. .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
  990. .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
  991. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  992. .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  993. MMC_CAP_NEEDS_POLL,
  994. .get_cd = slot_cn23_get_cd,
  995. };
  996. static struct resource sdhi2_resources[] = {
  997. [0] = {
  998. .name = "SDHI2",
  999. .start = 0xe6870000,
  1000. .end = 0xe68700ff,
  1001. .flags = IORESOURCE_MEM,
  1002. },
  1003. [1] = {
  1004. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  1005. .start = evt2irq(0x1200), /* SDHI2_SDHI2I0 */
  1006. .flags = IORESOURCE_IRQ,
  1007. },
  1008. [2] = {
  1009. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  1010. .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
  1011. .flags = IORESOURCE_IRQ,
  1012. },
  1013. [3] = {
  1014. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  1015. .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
  1016. .flags = IORESOURCE_IRQ,
  1017. },
  1018. };
  1019. static struct platform_device sdhi2_device = {
  1020. .name = "sh_mobile_sdhi",
  1021. .num_resources = ARRAY_SIZE(sdhi2_resources),
  1022. .resource = sdhi2_resources,
  1023. .id = 2,
  1024. .dev = {
  1025. .platform_data = &sdhi2_info,
  1026. },
  1027. };
  1028. /* SH_MMCIF */
  1029. static struct resource sh_mmcif_resources[] = {
  1030. [0] = {
  1031. .name = "MMCIF",
  1032. .start = 0xE6BD0000,
  1033. .end = 0xE6BD00FF,
  1034. .flags = IORESOURCE_MEM,
  1035. },
  1036. [1] = {
  1037. /* MMC ERR */
  1038. .start = evt2irq(0x1ac0),
  1039. .flags = IORESOURCE_IRQ,
  1040. },
  1041. [2] = {
  1042. /* MMC NOR */
  1043. .start = evt2irq(0x1ae0),
  1044. .flags = IORESOURCE_IRQ,
  1045. },
  1046. };
  1047. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  1048. .sup_pclk = 0,
  1049. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  1050. .caps = MMC_CAP_4_BIT_DATA |
  1051. MMC_CAP_8_BIT_DATA |
  1052. MMC_CAP_NEEDS_POLL,
  1053. .get_cd = slot_cn7_get_cd,
  1054. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  1055. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  1056. };
  1057. static struct platform_device sh_mmcif_device = {
  1058. .name = "sh_mmcif",
  1059. .id = 0,
  1060. .dev = {
  1061. .dma_mask = NULL,
  1062. .coherent_dma_mask = 0xffffffff,
  1063. .platform_data = &sh_mmcif_plat,
  1064. },
  1065. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  1066. .resource = sh_mmcif_resources,
  1067. };
  1068. static int mackerel_camera_add(struct soc_camera_device *icd);
  1069. static void mackerel_camera_del(struct soc_camera_device *icd);
  1070. static int camera_set_capture(struct soc_camera_platform_info *info,
  1071. int enable)
  1072. {
  1073. return 0; /* camera sensor always enabled */
  1074. }
  1075. static struct soc_camera_platform_info camera_info = {
  1076. .format_name = "UYVY",
  1077. .format_depth = 16,
  1078. .format = {
  1079. .code = V4L2_MBUS_FMT_UYVY8_2X8,
  1080. .colorspace = V4L2_COLORSPACE_SMPTE170M,
  1081. .field = V4L2_FIELD_NONE,
  1082. .width = 640,
  1083. .height = 480,
  1084. },
  1085. .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
  1086. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
  1087. V4L2_MBUS_DATA_ACTIVE_HIGH,
  1088. .mbus_type = V4L2_MBUS_PARALLEL,
  1089. .set_capture = camera_set_capture,
  1090. };
  1091. static struct soc_camera_link camera_link = {
  1092. .bus_id = 0,
  1093. .add_device = mackerel_camera_add,
  1094. .del_device = mackerel_camera_del,
  1095. .module_name = "soc_camera_platform",
  1096. .priv = &camera_info,
  1097. };
  1098. static struct platform_device *camera_device;
  1099. static void mackerel_camera_release(struct device *dev)
  1100. {
  1101. soc_camera_platform_release(&camera_device);
  1102. }
  1103. static int mackerel_camera_add(struct soc_camera_device *icd)
  1104. {
  1105. return soc_camera_platform_add(icd, &camera_device, &camera_link,
  1106. mackerel_camera_release, 0);
  1107. }
  1108. static void mackerel_camera_del(struct soc_camera_device *icd)
  1109. {
  1110. soc_camera_platform_del(icd, camera_device, &camera_link);
  1111. }
  1112. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  1113. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  1114. };
  1115. static struct resource ceu_resources[] = {
  1116. [0] = {
  1117. .name = "CEU",
  1118. .start = 0xfe910000,
  1119. .end = 0xfe91009f,
  1120. .flags = IORESOURCE_MEM,
  1121. },
  1122. [1] = {
  1123. .start = intcs_evt2irq(0x880),
  1124. .flags = IORESOURCE_IRQ,
  1125. },
  1126. [2] = {
  1127. /* place holder for contiguous memory */
  1128. },
  1129. };
  1130. static struct platform_device ceu_device = {
  1131. .name = "sh_mobile_ceu",
  1132. .id = 0, /* "ceu0" clock */
  1133. .num_resources = ARRAY_SIZE(ceu_resources),
  1134. .resource = ceu_resources,
  1135. .dev = {
  1136. .platform_data = &sh_mobile_ceu_info,
  1137. .coherent_dma_mask = 0xffffffff,
  1138. },
  1139. };
  1140. static struct platform_device mackerel_camera = {
  1141. .name = "soc-camera-pdrv",
  1142. .id = 0,
  1143. .dev = {
  1144. .platform_data = &camera_link,
  1145. },
  1146. };
  1147. static struct platform_device *mackerel_devices[] __initdata = {
  1148. &nor_flash_device,
  1149. &smc911x_device,
  1150. &lcdc_device,
  1151. &usbhs1_device,
  1152. &usbhs0_device,
  1153. &leds_device,
  1154. &fsi_device,
  1155. &fsi_ak4643_device,
  1156. &fsi_hdmi_device,
  1157. &nand_flash_device,
  1158. &sdhi0_device,
  1159. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1160. &sdhi1_device,
  1161. #endif
  1162. &sdhi2_device,
  1163. &sh_mmcif_device,
  1164. &ceu_device,
  1165. &mackerel_camera,
  1166. &hdmi_device,
  1167. &hdmi_lcdc_device,
  1168. &meram_device,
  1169. };
  1170. /* Keypad Initialization */
  1171. #define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
  1172. { \
  1173. .type = ev_type, \
  1174. .code = ev_code, \
  1175. .active_low = act_low, \
  1176. }
  1177. #define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
  1178. static struct tca6416_button mackerel_gpio_keys[] = {
  1179. KEYPAD_BUTTON_LOW(KEY_HOME),
  1180. KEYPAD_BUTTON_LOW(KEY_MENU),
  1181. KEYPAD_BUTTON_LOW(KEY_BACK),
  1182. KEYPAD_BUTTON_LOW(KEY_POWER),
  1183. };
  1184. static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
  1185. .buttons = mackerel_gpio_keys,
  1186. .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
  1187. .rep = 1,
  1188. .use_polling = 0,
  1189. .pinmask = 0x000F,
  1190. };
  1191. /* I2C */
  1192. #define IRQ7 evt2irq(0x02e0)
  1193. #define IRQ9 evt2irq(0x0320)
  1194. static struct i2c_board_info i2c0_devices[] = {
  1195. {
  1196. I2C_BOARD_INFO("ak4643", 0x13),
  1197. },
  1198. /* Keypad */
  1199. {
  1200. I2C_BOARD_INFO("tca6408-keys", 0x20),
  1201. .platform_data = &mackerel_tca6416_keys_info,
  1202. .irq = IRQ9,
  1203. },
  1204. /* Touchscreen */
  1205. {
  1206. I2C_BOARD_INFO("st1232-ts", 0x55),
  1207. .irq = IRQ7,
  1208. },
  1209. };
  1210. #define IRQ21 evt2irq(0x32a0)
  1211. static struct i2c_board_info i2c1_devices[] = {
  1212. /* Accelerometer */
  1213. {
  1214. I2C_BOARD_INFO("adxl34x", 0x53),
  1215. .irq = IRQ21,
  1216. },
  1217. };
  1218. #define GPIO_PORT9CR 0xE6051009
  1219. #define GPIO_PORT10CR 0xE605100A
  1220. #define GPIO_PORT167CR 0xE60520A7
  1221. #define GPIO_PORT168CR 0xE60520A8
  1222. #define SRCR4 0xe61580bc
  1223. #define USCCR1 0xE6058144
  1224. static void __init mackerel_init(void)
  1225. {
  1226. u32 srcr4;
  1227. struct clk *clk;
  1228. /* External clock source */
  1229. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1230. sh7372_pinmux_init();
  1231. /* enable SCIFA0 */
  1232. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1233. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1234. /* enable SMSC911X */
  1235. gpio_request(GPIO_FN_CS5A, NULL);
  1236. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1237. /* LCDC */
  1238. gpio_request(GPIO_FN_LCDD23, NULL);
  1239. gpio_request(GPIO_FN_LCDD22, NULL);
  1240. gpio_request(GPIO_FN_LCDD21, NULL);
  1241. gpio_request(GPIO_FN_LCDD20, NULL);
  1242. gpio_request(GPIO_FN_LCDD19, NULL);
  1243. gpio_request(GPIO_FN_LCDD18, NULL);
  1244. gpio_request(GPIO_FN_LCDD17, NULL);
  1245. gpio_request(GPIO_FN_LCDD16, NULL);
  1246. gpio_request(GPIO_FN_LCDD15, NULL);
  1247. gpio_request(GPIO_FN_LCDD14, NULL);
  1248. gpio_request(GPIO_FN_LCDD13, NULL);
  1249. gpio_request(GPIO_FN_LCDD12, NULL);
  1250. gpio_request(GPIO_FN_LCDD11, NULL);
  1251. gpio_request(GPIO_FN_LCDD10, NULL);
  1252. gpio_request(GPIO_FN_LCDD9, NULL);
  1253. gpio_request(GPIO_FN_LCDD8, NULL);
  1254. gpio_request(GPIO_FN_LCDD7, NULL);
  1255. gpio_request(GPIO_FN_LCDD6, NULL);
  1256. gpio_request(GPIO_FN_LCDD5, NULL);
  1257. gpio_request(GPIO_FN_LCDD4, NULL);
  1258. gpio_request(GPIO_FN_LCDD3, NULL);
  1259. gpio_request(GPIO_FN_LCDD2, NULL);
  1260. gpio_request(GPIO_FN_LCDD1, NULL);
  1261. gpio_request(GPIO_FN_LCDD0, NULL);
  1262. gpio_request(GPIO_FN_LCDDISP, NULL);
  1263. gpio_request(GPIO_FN_LCDDCK, NULL);
  1264. gpio_request(GPIO_PORT31, NULL); /* backlight */
  1265. gpio_direction_output(GPIO_PORT31, 0); /* off by default */
  1266. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1267. gpio_direction_output(GPIO_PORT151, 1);
  1268. /* USBHS0 */
  1269. gpio_request(GPIO_FN_VBUS0_0, NULL);
  1270. gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */
  1271. /* USBHS1 */
  1272. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1273. gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
  1274. gpio_request(GPIO_FN_IDIN_1_113, NULL);
  1275. /* enable FSI2 port A (ak4643) */
  1276. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1277. gpio_request(GPIO_FN_FSIAILR, NULL);
  1278. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1279. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1280. gpio_request(GPIO_PORT161, NULL);
  1281. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1282. gpio_request(GPIO_PORT9, NULL);
  1283. gpio_request(GPIO_PORT10, NULL);
  1284. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1285. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1286. intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
  1287. /* setup FSI2 port B (HDMI) */
  1288. gpio_request(GPIO_FN_FSIBCK, NULL);
  1289. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1290. /* set SPU2 clock to 119.6 MHz */
  1291. clk = clk_get(NULL, "spu_clk");
  1292. if (!IS_ERR(clk)) {
  1293. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1294. clk_put(clk);
  1295. }
  1296. /* enable Keypad */
  1297. gpio_request(GPIO_FN_IRQ9_42, NULL);
  1298. irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
  1299. /* enable Touchscreen */
  1300. gpio_request(GPIO_FN_IRQ7_40, NULL);
  1301. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1302. /* enable Accelerometer */
  1303. gpio_request(GPIO_FN_IRQ21, NULL);
  1304. irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
  1305. /* enable SDHI0 */
  1306. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1307. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1308. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1309. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1310. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1311. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1312. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1313. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1314. /* enable SDHI1 */
  1315. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1316. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1317. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1318. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1319. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1320. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1321. #endif
  1322. /* card detect pin for MMC slot (CN7) */
  1323. gpio_request(GPIO_PORT41, NULL);
  1324. gpio_direction_input(GPIO_PORT41);
  1325. /* enable SDHI2 */
  1326. gpio_request(GPIO_FN_SDHICMD2, NULL);
  1327. gpio_request(GPIO_FN_SDHICLK2, NULL);
  1328. gpio_request(GPIO_FN_SDHID2_3, NULL);
  1329. gpio_request(GPIO_FN_SDHID2_2, NULL);
  1330. gpio_request(GPIO_FN_SDHID2_1, NULL);
  1331. gpio_request(GPIO_FN_SDHID2_0, NULL);
  1332. /* card detect pin for microSD slot (CN23) */
  1333. gpio_request(GPIO_PORT162, NULL);
  1334. gpio_direction_input(GPIO_PORT162);
  1335. /* MMCIF */
  1336. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1337. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1338. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1339. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1340. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1341. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1342. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1343. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1344. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1345. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1346. /* FLCTL */
  1347. gpio_request(GPIO_FN_D0_NAF0, NULL);
  1348. gpio_request(GPIO_FN_D1_NAF1, NULL);
  1349. gpio_request(GPIO_FN_D2_NAF2, NULL);
  1350. gpio_request(GPIO_FN_D3_NAF3, NULL);
  1351. gpio_request(GPIO_FN_D4_NAF4, NULL);
  1352. gpio_request(GPIO_FN_D5_NAF5, NULL);
  1353. gpio_request(GPIO_FN_D6_NAF6, NULL);
  1354. gpio_request(GPIO_FN_D7_NAF7, NULL);
  1355. gpio_request(GPIO_FN_D8_NAF8, NULL);
  1356. gpio_request(GPIO_FN_D9_NAF9, NULL);
  1357. gpio_request(GPIO_FN_D10_NAF10, NULL);
  1358. gpio_request(GPIO_FN_D11_NAF11, NULL);
  1359. gpio_request(GPIO_FN_D12_NAF12, NULL);
  1360. gpio_request(GPIO_FN_D13_NAF13, NULL);
  1361. gpio_request(GPIO_FN_D14_NAF14, NULL);
  1362. gpio_request(GPIO_FN_D15_NAF15, NULL);
  1363. gpio_request(GPIO_FN_FCE0, NULL);
  1364. gpio_request(GPIO_FN_WE0_FWE, NULL);
  1365. gpio_request(GPIO_FN_FRB, NULL);
  1366. gpio_request(GPIO_FN_A4_FOE, NULL);
  1367. gpio_request(GPIO_FN_A5_FCDE, NULL);
  1368. gpio_request(GPIO_FN_RD_FSC, NULL);
  1369. /* enable GPS module (GT-720F) */
  1370. gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
  1371. gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
  1372. /* CEU */
  1373. gpio_request(GPIO_FN_VIO_CLK, NULL);
  1374. gpio_request(GPIO_FN_VIO_VD, NULL);
  1375. gpio_request(GPIO_FN_VIO_HD, NULL);
  1376. gpio_request(GPIO_FN_VIO_FIELD, NULL);
  1377. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1378. gpio_request(GPIO_FN_VIO_D7, NULL);
  1379. gpio_request(GPIO_FN_VIO_D6, NULL);
  1380. gpio_request(GPIO_FN_VIO_D5, NULL);
  1381. gpio_request(GPIO_FN_VIO_D4, NULL);
  1382. gpio_request(GPIO_FN_VIO_D3, NULL);
  1383. gpio_request(GPIO_FN_VIO_D2, NULL);
  1384. gpio_request(GPIO_FN_VIO_D1, NULL);
  1385. gpio_request(GPIO_FN_VIO_D0, NULL);
  1386. /* HDMI */
  1387. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1388. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1389. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1390. srcr4 = __raw_readl(SRCR4);
  1391. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1392. udelay(50);
  1393. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1394. i2c_register_board_info(0, i2c0_devices,
  1395. ARRAY_SIZE(i2c0_devices));
  1396. i2c_register_board_info(1, i2c1_devices,
  1397. ARRAY_SIZE(i2c1_devices));
  1398. sh7372_add_standard_devices();
  1399. platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
  1400. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
  1401. sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device);
  1402. sh7372_add_device_to_domain(&sh7372_a4lc, &meram_device);
  1403. sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
  1404. sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
  1405. sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
  1406. sh7372_add_device_to_domain(&sh7372_a3sp, &nand_flash_device);
  1407. sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
  1408. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
  1409. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1410. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
  1411. #endif
  1412. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device);
  1413. sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
  1414. hdmi_init_pm_clock();
  1415. sh7372_pm_init();
  1416. pm_clk_add(&fsi_device.dev, "spu2");
  1417. pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
  1418. }
  1419. MACHINE_START(MACKEREL, "mackerel")
  1420. .map_io = sh7372_map_io,
  1421. .init_early = sh7372_add_early_devices,
  1422. .init_irq = sh7372_init_irq,
  1423. .handle_irq = shmobile_handle_irq_intc,
  1424. .init_machine = mackerel_init,
  1425. .timer = &shmobile_timer,
  1426. MACHINE_END