debug-macro.S 2.8 KB

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  1. /* arch/arm/mach-s3c2410/include/mach/debug-macro.S
  2. *
  3. * Debugging macro include header
  4. *
  5. * Copyright (C) 1994-1999 Russell King
  6. * Copyright (C) 2005 Simtec Electronics
  7. *
  8. * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <mach/map.h>
  15. #include <mach/regs-gpio.h>
  16. #include <plat/regs-serial.h>
  17. #define S3C2410_UART1_OFF (0x4000)
  18. #define SHIFT_2440TXF (14-9)
  19. .macro addruart, rp, rv, tmp
  20. ldr \rp, = S3C24XX_PA_UART
  21. ldr \rv, = S3C24XX_VA_UART
  22. #if CONFIG_DEBUG_S3C_UART != 0
  23. add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
  24. add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
  25. #endif
  26. .endm
  27. .macro fifo_full_s3c24xx rd, rx
  28. @ check for arm920 vs arm926. currently assume all arm926
  29. @ devices have an 64 byte FIFO identical to the s3c2440
  30. mrc p15, 0, \rd, c0, c0
  31. and \rd, \rd, #0xff0
  32. teq \rd, #0x260
  33. beq 1004f
  34. mrc p15, 0, \rd, c1, c0
  35. tst \rd, #1
  36. addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
  37. addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
  38. bic \rd, \rd, #0xff000
  39. ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
  40. and \rd, \rd, #0x00ff0000
  41. teq \rd, #0x00440000 @ is it 2440?
  42. 1004:
  43. ldr \rd, [\rx, # S3C2410_UFSTAT]
  44. moveq \rd, \rd, lsr #SHIFT_2440TXF
  45. tst \rd, #S3C2410_UFSTAT_TXFULL
  46. .endm
  47. .macro fifo_full_s3c2410 rd, rx
  48. ldr \rd, [\rx, # S3C2410_UFSTAT]
  49. tst \rd, #S3C2410_UFSTAT_TXFULL
  50. .endm
  51. /* fifo level reading */
  52. .macro fifo_level_s3c24xx rd, rx
  53. @ check for arm920 vs arm926. currently assume all arm926
  54. @ devices have an 64 byte FIFO identical to the s3c2440
  55. mrc p15, 0, \rd, c0, c0
  56. and \rd, \rd, #0xff0
  57. teq \rd, #0x260
  58. beq 10000f
  59. mrc p15, 0, \rd, c1, c0
  60. tst \rd, #1
  61. addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
  62. addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
  63. bic \rd, \rd, #0xff000
  64. ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
  65. and \rd, \rd, #0x00ff0000
  66. teq \rd, #0x00440000 @ is it 2440?
  67. 10000:
  68. ldr \rd, [\rx, # S3C2410_UFSTAT]
  69. andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
  70. andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
  71. .endm
  72. .macro fifo_level_s3c2410 rd, rx
  73. ldr \rd, [\rx, # S3C2410_UFSTAT]
  74. and \rd, \rd, #S3C2410_UFSTAT_TXMASK
  75. .endm
  76. /* Select the correct implementation depending on the configuration. The
  77. * S3C2440 will get selected by default, as these are the most widely
  78. * used variants of these
  79. */
  80. #if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
  81. #define fifo_full fifo_full_s3c2410
  82. #define fifo_level fifo_level_s3c2410
  83. #elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
  84. #define fifo_full fifo_full_s3c24xx
  85. #define fifo_level fifo_level_s3c24xx
  86. #endif
  87. /* include the reset of the code which will do the work */
  88. #include <plat/debug-macro.S>