pxa168.c 6.9 KB

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  1. /*
  2. * linux/arch/arm/mach-mmp/pxa168.c
  3. *
  4. * Code specific to PXA168
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/list.h>
  14. #include <linux/io.h>
  15. #include <linux/clk.h>
  16. #include <linux/platform_device.h>
  17. #include <asm/mach/time.h>
  18. #include <asm/system_misc.h>
  19. #include <mach/addr-map.h>
  20. #include <mach/cputype.h>
  21. #include <mach/regs-apbc.h>
  22. #include <mach/regs-apmu.h>
  23. #include <mach/irqs.h>
  24. #include <mach/dma.h>
  25. #include <mach/devices.h>
  26. #include <mach/mfp.h>
  27. #include <linux/dma-mapping.h>
  28. #include <mach/pxa168.h>
  29. #include "common.h"
  30. #include "clock.h"
  31. #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
  32. static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
  33. {
  34. MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
  35. MFP_ADDR_X(GPIO37, GPIO55, 0x000),
  36. MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
  37. MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
  38. MFP_ADDR_END,
  39. };
  40. void __init pxa168_init_irq(void)
  41. {
  42. icu_init_irq();
  43. }
  44. /* APB peripheral clocks */
  45. static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
  46. static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
  47. static APBC_CLK(uart3, PXA168_UART3, 1, 14745600);
  48. static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
  49. static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
  50. static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
  51. static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
  52. static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
  53. static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
  54. static APBC_CLK(ssp1, PXA168_SSP1, 4, 0);
  55. static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
  56. static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
  57. static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
  58. static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
  59. static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
  60. static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
  61. static APBC_CLK(rtc, PXA168_RTC, 8, 32768);
  62. static APMU_CLK(nand, NAND, 0x19b, 156000000);
  63. static APMU_CLK(lcd, LCD, 0x7f, 312000000);
  64. static APMU_CLK(eth, ETH, 0x09, 0);
  65. static APMU_CLK(usb, USB, 0x12, 0);
  66. /* device and clock bindings */
  67. static struct clk_lookup pxa168_clkregs[] = {
  68. INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
  69. INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
  70. INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
  71. INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
  72. INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
  73. INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
  74. INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
  75. INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
  76. INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
  77. INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
  78. INIT_CLKREG(&clk_ssp2, "pxa168-ssp.1", NULL),
  79. INIT_CLKREG(&clk_ssp3, "pxa168-ssp.2", NULL),
  80. INIT_CLKREG(&clk_ssp4, "pxa168-ssp.3", NULL),
  81. INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
  82. INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
  83. INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
  84. INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
  85. INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
  86. INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
  87. INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
  88. INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
  89. };
  90. static int __init pxa168_init(void)
  91. {
  92. if (cpu_is_pxa168()) {
  93. mfp_init_base(MFPR_VIRT_BASE);
  94. mfp_init_addr(pxa168_mfp_addr_map);
  95. pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
  96. clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
  97. }
  98. return 0;
  99. }
  100. postcore_initcall(pxa168_init);
  101. /* system timer - clock enabled, 3.25MHz */
  102. #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
  103. static void __init pxa168_timer_init(void)
  104. {
  105. /* this is early, we have to initialize the CCU registers by
  106. * ourselves instead of using clk_* API. Clock rate is defined
  107. * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
  108. */
  109. __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS);
  110. /* 3.25MHz, bus/functional clock enabled, release reset */
  111. __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS);
  112. timer_init(IRQ_PXA168_TIMER1);
  113. }
  114. struct sys_timer pxa168_timer = {
  115. .init = pxa168_timer_init,
  116. };
  117. void pxa168_clear_keypad_wakeup(void)
  118. {
  119. uint32_t val;
  120. uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
  121. /* wake event clear is needed in order to clear keypad interrupt */
  122. val = __raw_readl(APMU_WAKE_CLR);
  123. __raw_writel(val | mask, APMU_WAKE_CLR);
  124. }
  125. /* on-chip devices */
  126. PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
  127. PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
  128. PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
  129. PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
  130. PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
  131. PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
  132. PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
  133. PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
  134. PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
  135. PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
  136. PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
  137. PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
  138. PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
  139. PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
  140. PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
  141. PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
  142. PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
  143. PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
  144. struct resource pxa168_resource_gpio[] = {
  145. {
  146. .start = 0xd4019000,
  147. .end = 0xd4019fff,
  148. .flags = IORESOURCE_MEM,
  149. }, {
  150. .start = IRQ_PXA168_GPIOX,
  151. .end = IRQ_PXA168_GPIOX,
  152. .name = "gpio_mux",
  153. .flags = IORESOURCE_IRQ,
  154. },
  155. };
  156. struct platform_device pxa168_device_gpio = {
  157. .name = "pxa-gpio",
  158. .id = -1,
  159. .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
  160. .resource = pxa168_resource_gpio,
  161. };
  162. struct resource pxa168_usb_host_resources[] = {
  163. /* USB Host conroller register base */
  164. [0] = {
  165. .start = 0xd4209000,
  166. .end = 0xd4209000 + 0x200,
  167. .flags = IORESOURCE_MEM,
  168. .name = "pxa168-usb-host",
  169. },
  170. /* USB PHY register base */
  171. [1] = {
  172. .start = 0xd4206000,
  173. .end = 0xd4206000 + 0xff,
  174. .flags = IORESOURCE_MEM,
  175. .name = "pxa168-usb-phy",
  176. },
  177. [2] = {
  178. .start = IRQ_PXA168_USB2,
  179. .end = IRQ_PXA168_USB2,
  180. .flags = IORESOURCE_IRQ,
  181. },
  182. };
  183. static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
  184. struct platform_device pxa168_device_usb_host = {
  185. .name = "pxa168-ehci",
  186. .id = -1,
  187. .dev = {
  188. .dma_mask = &pxa168_usb_host_dmamask,
  189. .coherent_dma_mask = DMA_BIT_MASK(32),
  190. },
  191. .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
  192. .resource = pxa168_usb_host_resources,
  193. };
  194. int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
  195. {
  196. pxa168_device_usb_host.dev.platform_data = pdata;
  197. return platform_device_register(&pxa168_device_usb_host);
  198. }
  199. void pxa168_restart(char mode, const char *cmd)
  200. {
  201. soft_restart(0xffff0000);
  202. }