at91sam9x5_matrix.h 2.4 KB

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  1. /*
  2. * Matrix-centric header file for the AT91SAM9x5 family
  3. *
  4. * Copyright (C) 2009-2012 Atmel Corporation.
  5. *
  6. * Only EBI related registers.
  7. * Write Protect register definitions may be useful.
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. #ifndef AT91SAM9X5_MATRIX_H
  12. #define AT91SAM9X5_MATRIX_H
  13. #define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */
  14. #define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
  15. #define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
  16. #define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
  17. #define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
  18. #define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
  19. #define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3)
  20. #define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
  21. #define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
  22. #define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
  23. #define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
  24. #define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
  25. #define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
  26. #define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
  27. #define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
  28. #define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
  29. #define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
  30. #define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
  31. #define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
  32. #define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */
  33. #define AT91_MATRIX_NFD0_ON_D0 (0 << 24)
  34. #define AT91_MATRIX_NFD0_ON_D16 (1 << 24)
  35. #define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */
  36. #define AT91_MATRIX_MP_OFF (0 << 25)
  37. #define AT91_MATRIX_MP_ON (1 << 25)
  38. #define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
  39. #define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
  40. #define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
  41. #define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
  42. #define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
  43. #define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
  44. #define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
  45. #define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
  46. #define AT91_MATRIX_WPSR_WPV (1 << 0)
  47. #define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
  48. #endif