*PADS2000*
*Z:\trinary\code\circuits\clock_gen.asc Fri Jul 04 13:08:26 2008*
*PART*
U1	8DIP300
C1	CK06
C2	CK06
R2	RC07
R1	RC07

*NET*
*SIGNAL* $G_Vss
U1.1 C1.2 C2.2
*SIGNAL* N002
U1.2 U1.6 C2.1 R2.2
*SIGNAL* CLK
U1.3
*SIGNAL* $G_Vdd
U1.4 U1.8 R1.1
*SIGNAL* N003
U1.5 C1.1
*SIGNAL* N001
U1.7 R2.1 R1.2
*END*
