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@@ -1,9 +1,12 @@
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+
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---
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-title: Flashing the X200 with a BeagleBone Black
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+title: Flashing the X200 with a BeagleBone Black
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...
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Initial flashing instructions for X200.
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+**Note:** If you are flashing an X200t, [see these alternate instructions](../hardware/x200t_external.html).
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+
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This guide is for those who want libreboot on their ThinkPad X200 while
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they still have the original Lenovo BIOS present. This guide can also be
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followed (adapted) if you brick your X200, to know how to recover.
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@@ -15,8 +18,9 @@ followed (adapted) if you brick your X200, to know how to recover.
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- [Boot it!](#boot)
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- [Wifi](#wifi)
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- [wwan](#wwan)
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+- [Intel Turbo Memory](#turbomem)
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- [Memory](#memory)
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-- [X200S and X200 Tablet users: GPIO33 trick will not work.](#gpio33)
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+- [X200s and X200t Specific Notes](#x200st)
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X200 laptops with libreboot pre-installed {#preinstall}
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=========================================
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@@ -32,9 +36,11 @@ Use this to find out:
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# flashrom -p internal -V
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The X200S and X200 Tablet will use a WSON-8 flash chip, on the bottom of
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-the motherboard (this requires removal of the motherboard). **Not all
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-X200S/X200T are supported; see
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-[../hardware/x200.html\#x200s](../hardware/x200.html#x200s).**
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+the motherboard (this requires removal of the motherboard).
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+
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+**Not all X200S/X200T are supported; see
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+[../hardware/x200.html\#x200s](../hardware/x200.html#x200s) or the additional
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+detail at the bottom of this page.**
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MAC address {#macaddress}
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===========
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@@ -56,6 +62,10 @@ Initial BBB configuration {#clip}
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Refer to [bbb\_setup.md](bbb_setup.md) for how to set up the BBB for
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flashing.
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+**Note:** If you don't have a BeagleBone Black, there are instructions for
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+[using a Raspberry Pi](./rpi_setup.html) (you may need to adjust them slightly
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+for your particular hardware).
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+
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The following shows how to connect the clip to the BBB (on the P9
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header), for SOIC-16 (clip: Pomona 5252):
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@@ -73,7 +83,7 @@ header), for SOIC-16 (clip: Pomona 5252):
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This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.
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Here is a photo of the SOIC-16 flash chip. Pins are labelled:
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-
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+
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The following shows how to connect the clip to the BBB (on the P9
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header), for SOIC-8 (clip: Pomona 5250):
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@@ -91,19 +101,13 @@ header), for SOIC-8 (clip: Pomona 5250):
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Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16
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chip on those pins?
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-**On the X200S and X200 Tablet the flash chip is underneath the board,
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-in a WSON package. The pinout is very much the same as a SOIC-8, but such package makes it impossible to use testclip.
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-In order to enable external flashing of device, chip has to be changed to SOIC-8 one. Such procedure requires hot air station and soldering station (with "knife" K-Tip to easily solder SOIC-8).\
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-Check the list of SOIC-8 flash chips at
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-[List of supported flash chips](https://www.flashrom.org/Supported_hardware#Supported_flash_chips)\
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-25XX series SPI NOR Flash in 8/16MiB sizes will work fine with libreboot.
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The procedure
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-------------
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-This section is for the X200. This does not apply to the X200S or X200
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-Tablet (for those systems, you have to remove the motherboard
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-completely, since the flash chip is on the other side of the board).
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+This section is for the X200. This does not apply to the X200S or X200 Tablet
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+(for those systems, you have to remove the motherboard completely, since the
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+flash chip is on the other side of the board. See below for more information).
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Remove these screws:\
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@@ -150,7 +154,8 @@ Log in as root on your BBB, using the instructions in
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[bbb\_setup.html\#bbb\_access](bbb_setup.html#bbb_access).
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Test that flashrom works:
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- # ./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512
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+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
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+
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In this case, the output was:
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flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
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@@ -162,20 +167,20 @@ In this case, the output was:
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Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E"
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Please specify which chip definition to use with the -c <chipname> option.
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-How to backup factory.rom (change the -c option as neeed, for your flash
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-chip):\
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-\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r
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-factory.rom**\
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-\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r
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-factory1.rom**\
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-\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -r
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-factory2.rom**\
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-Note: the **-c** option is not required in libreboot's patched
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+Here is how to backup factory.rom:
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+
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+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom
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+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
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+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom
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+
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+**Note:** the **-c** option is not required in libreboot's patched
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flashrom, because the redundant flash chip definitions in *flashchips.c*
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-have been removed.\
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+have been removed.
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+
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Now compare the 3 images:
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# sha512sum factory\*.rom
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+
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If the hashes match, then just copy one of them (the factory.rom) to a
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safe place (on a drive connected to another system, not the BBB). This
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is useful for reverse engineering work, if there is a desirable
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@@ -189,9 +194,8 @@ flashing it. Although there is a default MAC address inside the ROM
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image, this is not what you want. **Make sure to always change the MAC
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address to one that is correct for your system.**
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-Now flash it:\
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-\# **./flashrom -p linux\_spi:dev=/dev/spidev1.0,spispeed=512 -w
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-path/to/libreboot/rom/image.rom -V**
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+Now flash it:
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+ # ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V
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@@ -245,6 +249,17 @@ track your movements.
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Not to be confused with wifi (wifi is fine).
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+Intel Turbo Memory {#turbomem}
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+==================
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+
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+Some X200 devices were sold with Intel Turbo Memory installed in the top-most
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+mini PCI-e slot. This has been [shown to be
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+ineffective](http://www.anandtech.com/show/2252) at disk caching or battery
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+saving in most use cases. While there are [Linux
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+drivers](https://github.com/yarrick/turbomem) available, it is blacklisted in at
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+least GNU+Trisquel, and possibly other free operating systems. It should
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+probably be removed.
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+
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Memory
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======
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@@ -269,8 +284,58 @@ You should see something like this:
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Now [install GNU+Linux](../gnulinux/).
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-X200S and X200 Tablet users: GPIO33 trick will not work. {#gpio33}
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---------------------------------------------------------
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+
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+X200s and X200t Specific Notes {#x200st}
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+==============================
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+
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+Chip Differences
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+----------------
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+Most notably, the BIOS chip is on the other side of the motherboard when
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+compared to the X200. It is also a slightly different form factor (WSON-8)
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+compared to the X200 (SOIC-8). The implication of this is that there is no clip
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+that can touch the tiny pins on the outside, so you'll either need to solder
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+wires to the chip (very difficult, but not impossible) or remove the chip
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+entirely. Note that there is a large thermal pad under the WSON-8 chip, which
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+makes it quite difficult to remove as it removes the heat you are applying.
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+Using a hot air gun, set the temperature to around 400 degrees Celcius and
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+gently heat the part evenly (it will not budge no matter how patient and careful
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+you are at a normally advisable 300-350C). Applying some Chip Quik (or similar)
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+will make removal easier. On the X200t especially, be careful of R647 in
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+immediate proximity to the flash chip.
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+
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+Once the chip has been removed from the motherboard, it can be replaced with a
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+suitable SOIC-8 that supports a clip.
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+
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+See the following images for reference:
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+
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+
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+
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+
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+If you choose to solder directly to the chip, you will probably have more
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+success using Kynar wire-wrapping wire (or similar). Secure the flyleads with
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+hot glue to prevent them from pulling off.
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+
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+
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+
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+If you intend on flashing the chip (either the WSON-8 or the SOIC-8) off the
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+motherboard, you need to pull the HOLD pin to +3.3V. Leaving it floating will
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+result in inconsistent writes as it bounces around. The motherboard does this by
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+default. Some chips you will also need to pull the WP pin to +3.3V, but on
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+others it is not necessary (check the datasheet for your specific chip,
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+depending if they default to LOW or HIGH).
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+
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+
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+
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+
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+Suitable WSON-8 Replacements
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+----------------------------
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+Check the list of SOIC-8 flash chips at [List of supported flash
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+chips](https://www.flashrom.org/Supported_hardware#Supported_flash_chips)\ 25XX
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+series SPI NOR Flash in 8/16MiB sizes will work fine with libreboot.
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+
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+
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+GPIO33 trick will not work. {#gpio33}
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+---------------------------
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sgsit found out about a pin called GPIO33, which can be grounded to
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disable the flashing protections by the descriptor and stop the ME from
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exotime
