armv7l_defs.M1 2.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118
  1. ## Copyright (C) 2016 Jeremiah Orians
  2. ## This file is part of stage0.
  3. ##
  4. ## stage0 is free software: you can redistribute it and/or modify
  5. ## it under the terms of the GNU General Public License as published by
  6. ## the Free Software Foundation, either version 3 of the License, or
  7. ## (at your option) any later version.
  8. ##
  9. ## stage0 is distributed in the hope that it will be useful,
  10. ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. ## GNU General Public License for more details.
  13. ##
  14. ## You should have received a copy of the GNU General Public License
  15. ## along with stage0. If not, see <http://www.gnu.org/licenses/>.
  16. # M2-Planet standards
  17. DEFINE NULL 00000000
  18. # Registers
  19. DEFINE R0 0
  20. DEFINE R1 1
  21. DEFINE R2 2
  22. DEFINE R3 3
  23. DEFINE R4 4
  24. DEFINE R5 5
  25. DEFINE R6 6
  26. DEFINE R7 7
  27. DEFINE R8 8
  28. DEFINE R9 9
  29. DEFINE R10 A
  30. DEFINE R11 B
  31. DEFINE R12 C
  32. DEFINE BP C
  33. DEFINE R13 D
  34. DEFINE SP D
  35. DEFINE R14 E
  36. DEFINE LR E
  37. DEFINE R15 F
  38. DEFINE PC F
  39. # Register masks for push/pop16
  40. DEFINE {R0} 0100
  41. DEFINE {R1} 0200
  42. DEFINE {R2} 0400
  43. DEFINE {R3} 0800
  44. DEFINE {R4} 1000
  45. DEFINE {R11} 0008
  46. DEFINE {BP} 0010
  47. DEFINE {LR} 0040
  48. # Bitshift constants
  49. DEFINE NO_SHIFT 0
  50. DEFINE LEFT 1
  51. DEFINE RIGHT 3
  52. DEFINE ARITH_RIGHT 5
  53. # LOAD/STORE
  54. DEFINE MEMORY E5
  55. DEFINE STORE32 08
  56. DEFINE STORE8 0C
  57. DEFINE LOAD32 09
  58. DEFINE LOAD8 0D
  59. DEFINE LOADI8_ALWAYS 0A0E3
  60. DEFINE LOADI8_G 0A0C3
  61. DEFINE LOADI8_GE 0A0A3
  62. DEFINE LOADI8_EQUAL 0A003
  63. DEFINE LOADI8_NE 0A013
  64. DEFINE LOADI8_LE 0A0D3
  65. DEFINE LOADI8_L 0A0B3
  66. DEFINE LOADI8_HI 0A083
  67. DEFINE LOADI8_HS 0A023
  68. DEFINE LOADI8_LS 0A093
  69. DEFINE LOADI8_LO 0A033
  70. # JUMP/BRANCH
  71. DEFINE JUMP_ALWAYS EA
  72. DEFINE JUMP_EQUAL 0A
  73. DEFINE JUMP_NE 1A
  74. DEFINE CALL_ALWAYS EB
  75. DEFINE CALL_REG_ALWAYS FF2FE1
  76. DEFINE RETURN FF2FE1
  77. # Data movement
  78. DEFINE MOVE_ALWAYS A0E1
  79. DEFINE MVN_ALWAYS 0E0E1
  80. DEFINE MVN_LT 0E0B1
  81. DEFINE MVNI8_EQUAL 0E003
  82. DEFINE PUSH_ALWAYS 2DE9
  83. DEFINE POP_ALWAYS BDE8
  84. # Arithmetic/logic
  85. DEFINE AUX_ALWAYS E1
  86. DEFINE IMM_ALWAYS E3
  87. DEFINE ARITH_ALWAYS E2
  88. DEFINE ARITH_GE A2
  89. DEFINE ARITH_LT B2
  90. DEFINE ARITH_NE 12
  91. DEFINE ARITH2_ALWAYS E0
  92. DEFINE ARITH2_GE A0
  93. DEFINE ADC 0A
  94. DEFINE ADCS 0B
  95. DEFINE ADD 08
  96. DEFINE ADDS 09
  97. DEFINE AND 00
  98. DEFINE CMP 005
  99. DEFINE CMPI8 005
  100. DEFINE MUL 0
  101. DEFINE MULS 1
  102. DEFINE OR 08
  103. DEFINE SHIFT A0
  104. DEFINE SUB 04
  105. DEFINE RSUB 06
  106. DEFINE XOR 02
  107. # SYSCALL
  108. DEFINE SYSCALL_ALWAYS 000000EF