MacroAssemblerARM.cpp 3.9 KB

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  1. /*
  2. * Copyright (C) 2009 University of Szeged
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * 1. Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * 2. Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. *
  14. * THIS SOFTWARE IS PROVIDED BY UNIVERSITY OF SZEGED ``AS IS'' AND ANY
  15. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL UNIVERSITY OF SZEGED OR
  18. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  21. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  22. * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  24. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #include "config.h"
  27. #if ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)
  28. #include "MacroAssemblerARM.h"
  29. #if OS(LINUX)
  30. #include <sys/types.h>
  31. #include <sys/stat.h>
  32. #include <fcntl.h>
  33. #include <unistd.h>
  34. #include <elf.h>
  35. #include <asm/hwcap.h>
  36. #endif
  37. namespace JSC {
  38. static bool isVFPPresent()
  39. {
  40. #if OS(LINUX)
  41. int fd = open("/proc/self/auxv", O_RDONLY);
  42. if (fd > 0) {
  43. Elf32_auxv_t aux;
  44. while (read(fd, &aux, sizeof(Elf32_auxv_t))) {
  45. if (aux.a_type == AT_HWCAP) {
  46. close(fd);
  47. return aux.a_un.a_val & HWCAP_VFP;
  48. }
  49. }
  50. close(fd);
  51. }
  52. #endif
  53. #if (COMPILER(RVCT) && defined(__TARGET_FPU_VFP)) || (COMPILER(GCC) && defined(__VFP_FP__))
  54. return true;
  55. #else
  56. return false;
  57. #endif
  58. }
  59. const bool MacroAssemblerARM::s_isVFPPresent = isVFPPresent();
  60. #if CPU(ARMV5_OR_LOWER)
  61. /* On ARMv5 and below, natural alignment is required. */
  62. void MacroAssemblerARM::load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
  63. {
  64. ARMWord op2;
  65. ASSERT(address.scale >= 0 && address.scale <= 3);
  66. op2 = m_assembler.lsl(address.index, static_cast<int>(address.scale));
  67. if (address.offset >= 0 && address.offset + 0x2 <= 0xff) {
  68. m_assembler.add(ARMRegisters::S0, address.base, op2);
  69. m_assembler.halfDtrUp(ARMAssembler::LoadUint16, dest, ARMRegisters::S0, ARMAssembler::getOp2Half(address.offset));
  70. m_assembler.halfDtrUp(ARMAssembler::LoadUint16, ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::getOp2Half(address.offset + 0x2));
  71. } else if (address.offset < 0 && address.offset >= -0xff) {
  72. m_assembler.add(ARMRegisters::S0, address.base, op2);
  73. m_assembler.halfDtrDown(ARMAssembler::LoadUint16, dest, ARMRegisters::S0, ARMAssembler::getOp2Half(-address.offset));
  74. m_assembler.halfDtrDown(ARMAssembler::LoadUint16, ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::getOp2Half(-address.offset - 0x2));
  75. } else {
  76. m_assembler.moveImm(address.offset, ARMRegisters::S0);
  77. m_assembler.add(ARMRegisters::S0, ARMRegisters::S0, op2);
  78. m_assembler.halfDtrUpRegister(ARMAssembler::LoadUint16, dest, address.base, ARMRegisters::S0);
  79. m_assembler.add(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::Op2Immediate | 0x2);
  80. m_assembler.halfDtrUpRegister(ARMAssembler::LoadUint16, ARMRegisters::S0, address.base, ARMRegisters::S0);
  81. }
  82. m_assembler.orr(dest, dest, m_assembler.lsl(ARMRegisters::S0, 16));
  83. }
  84. #endif
  85. }
  86. #endif // ENABLE(ASSEMBLER) && CPU(ARM_TRADITIONAL)