sha1block_arm.s 5.5 KB

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  1. // Copyright 2014 The Go Authors. All rights reserved.
  2. // Use of this source code is governed by a BSD-style
  3. // license that can be found in the LICENSE file.
  4. //
  5. // ARM version of md5block.go
  6. #include "textflag.h"
  7. // SHA1 block routine. See sha1block.go for Go equivalent.
  8. //
  9. // There are 80 rounds of 4 types:
  10. // - rounds 0-15 are type 1 and load data (ROUND1 macro).
  11. // - rounds 16-19 are type 1 and do not load data (ROUND1x macro).
  12. // - rounds 20-39 are type 2 and do not load data (ROUND2 macro).
  13. // - rounds 40-59 are type 3 and do not load data (ROUND3 macro).
  14. // - rounds 60-79 are type 4 and do not load data (ROUND4 macro).
  15. //
  16. // Each round loads or shuffles the data, then computes a per-round
  17. // function of b, c, d, and then mixes the result into and rotates the
  18. // five registers a, b, c, d, e holding the intermediate results.
  19. //
  20. // The register rotation is implemented by rotating the arguments to
  21. // the round macros instead of by explicit move instructions.
  22. // Register definitions
  23. #define Rdata R0 // Pointer to incoming data
  24. #define Rconst R1 // Current constant for SHA round
  25. #define Ra R2 // SHA1 accumulator
  26. #define Rb R3 // SHA1 accumulator
  27. #define Rc R4 // SHA1 accumulator
  28. #define Rd R5 // SHA1 accumulator
  29. #define Re R6 // SHA1 accumulator
  30. #define Rt0 R7 // Temporary
  31. #define Rt1 R8 // Temporary
  32. // r9, r10 are forbidden
  33. // r11 is OK provided you check the assembler that no synthetic instructions use it
  34. #define Rt2 R11 // Temporary
  35. #define Rctr R12 // loop counter
  36. #define Rw R14 // point to w buffer
  37. // func block(dig *digest, p []byte)
  38. // 0(FP) is *digest
  39. // 4(FP) is p.array (struct Slice)
  40. // 8(FP) is p.len
  41. //12(FP) is p.cap
  42. //
  43. // Stack frame
  44. #define p_end end-4(SP) // pointer to the end of data
  45. #define p_data data-8(SP) // current data pointer (unused?)
  46. #define w_buf buf-(8+4*80)(SP) //80 words temporary buffer w uint32[80]
  47. #define saved abcde-(8+4*80+4*5)(SP) // saved sha1 registers a,b,c,d,e - these must be last (unused?)
  48. // Total size +4 for saved LR is 352
  49. // w[i] = p[j]<<24 | p[j+1]<<16 | p[j+2]<<8 | p[j+3]
  50. // e += w[i]
  51. #define LOAD(Re) \
  52. MOVBU 2(Rdata), Rt0 ; \
  53. MOVBU 3(Rdata), Rt1 ; \
  54. MOVBU 1(Rdata), Rt2 ; \
  55. ORR Rt0<<8, Rt1, Rt0 ; \
  56. MOVBU.P 4(Rdata), Rt1 ; \
  57. ORR Rt2<<16, Rt0, Rt0 ; \
  58. ORR Rt1<<24, Rt0, Rt0 ; \
  59. MOVW.P Rt0, 4(Rw) ; \
  60. ADD Rt0, Re, Re
  61. // tmp := w[(i-3)&0xf] ^ w[(i-8)&0xf] ^ w[(i-14)&0xf] ^ w[(i)&0xf]
  62. // w[i&0xf] = tmp<<1 | tmp>>(32-1)
  63. // e += w[i&0xf]
  64. #define SHUFFLE(Re) \
  65. MOVW (-16*4)(Rw), Rt0 ; \
  66. MOVW (-14*4)(Rw), Rt1 ; \
  67. MOVW (-8*4)(Rw), Rt2 ; \
  68. EOR Rt0, Rt1, Rt0 ; \
  69. MOVW (-3*4)(Rw), Rt1 ; \
  70. EOR Rt2, Rt0, Rt0 ; \
  71. EOR Rt0, Rt1, Rt0 ; \
  72. MOVW Rt0@>(32-1), Rt0 ; \
  73. MOVW.P Rt0, 4(Rw) ; \
  74. ADD Rt0, Re, Re
  75. // t1 = (b & c) | ((~b) & d)
  76. #define FUNC1(Ra, Rb, Rc, Rd, Re) \
  77. MVN Rb, Rt1 ; \
  78. AND Rb, Rc, Rt0 ; \
  79. AND Rd, Rt1, Rt1 ; \
  80. ORR Rt0, Rt1, Rt1
  81. // t1 = b ^ c ^ d
  82. #define FUNC2(Ra, Rb, Rc, Rd, Re) \
  83. EOR Rb, Rc, Rt1 ; \
  84. EOR Rd, Rt1, Rt1
  85. // t1 = (b & c) | (b & d) | (c & d) =
  86. // t1 = (b & c) | ((b | c) & d)
  87. #define FUNC3(Ra, Rb, Rc, Rd, Re) \
  88. ORR Rb, Rc, Rt0 ; \
  89. AND Rb, Rc, Rt1 ; \
  90. AND Rd, Rt0, Rt0 ; \
  91. ORR Rt0, Rt1, Rt1
  92. #define FUNC4 FUNC2
  93. // a5 := a<<5 | a>>(32-5)
  94. // b = b<<30 | b>>(32-30)
  95. // e = a5 + t1 + e + const
  96. #define MIX(Ra, Rb, Rc, Rd, Re) \
  97. ADD Rt1, Re, Re ; \
  98. MOVW Rb@>(32-30), Rb ; \
  99. ADD Ra@>(32-5), Re, Re ; \
  100. ADD Rconst, Re, Re
  101. #define ROUND1(Ra, Rb, Rc, Rd, Re) \
  102. LOAD(Re) ; \
  103. FUNC1(Ra, Rb, Rc, Rd, Re) ; \
  104. MIX(Ra, Rb, Rc, Rd, Re)
  105. #define ROUND1x(Ra, Rb, Rc, Rd, Re) \
  106. SHUFFLE(Re) ; \
  107. FUNC1(Ra, Rb, Rc, Rd, Re) ; \
  108. MIX(Ra, Rb, Rc, Rd, Re)
  109. #define ROUND2(Ra, Rb, Rc, Rd, Re) \
  110. SHUFFLE(Re) ; \
  111. FUNC2(Ra, Rb, Rc, Rd, Re) ; \
  112. MIX(Ra, Rb, Rc, Rd, Re)
  113. #define ROUND3(Ra, Rb, Rc, Rd, Re) \
  114. SHUFFLE(Re) ; \
  115. FUNC3(Ra, Rb, Rc, Rd, Re) ; \
  116. MIX(Ra, Rb, Rc, Rd, Re)
  117. #define ROUND4(Ra, Rb, Rc, Rd, Re) \
  118. SHUFFLE(Re) ; \
  119. FUNC4(Ra, Rb, Rc, Rd, Re) ; \
  120. MIX(Ra, Rb, Rc, Rd, Re)
  121. // func block(dig *digest, p []byte)
  122. TEXT ·block(SB), 0, $352-16
  123. MOVW p+4(FP), Rdata // pointer to the data
  124. MOVW p_len+8(FP), Rt0 // number of bytes
  125. ADD Rdata, Rt0
  126. MOVW Rt0, p_end // pointer to end of data
  127. // Load up initial SHA1 accumulator
  128. MOVW dig+0(FP), Rt0
  129. MOVM.IA (Rt0), [Ra,Rb,Rc,Rd,Re]
  130. loop:
  131. // Save registers at SP+4 onwards
  132. MOVM.IB [Ra,Rb,Rc,Rd,Re], (R13)
  133. MOVW $w_buf, Rw
  134. MOVW $0x5A827999, Rconst
  135. MOVW $3, Rctr
  136. loop1: ROUND1(Ra, Rb, Rc, Rd, Re)
  137. ROUND1(Re, Ra, Rb, Rc, Rd)
  138. ROUND1(Rd, Re, Ra, Rb, Rc)
  139. ROUND1(Rc, Rd, Re, Ra, Rb)
  140. ROUND1(Rb, Rc, Rd, Re, Ra)
  141. SUB.S $1, Rctr
  142. BNE loop1
  143. ROUND1(Ra, Rb, Rc, Rd, Re)
  144. ROUND1x(Re, Ra, Rb, Rc, Rd)
  145. ROUND1x(Rd, Re, Ra, Rb, Rc)
  146. ROUND1x(Rc, Rd, Re, Ra, Rb)
  147. ROUND1x(Rb, Rc, Rd, Re, Ra)
  148. MOVW $0x6ED9EBA1, Rconst
  149. MOVW $4, Rctr
  150. loop2: ROUND2(Ra, Rb, Rc, Rd, Re)
  151. ROUND2(Re, Ra, Rb, Rc, Rd)
  152. ROUND2(Rd, Re, Ra, Rb, Rc)
  153. ROUND2(Rc, Rd, Re, Ra, Rb)
  154. ROUND2(Rb, Rc, Rd, Re, Ra)
  155. SUB.S $1, Rctr
  156. BNE loop2
  157. MOVW $0x8F1BBCDC, Rconst
  158. MOVW $4, Rctr
  159. loop3: ROUND3(Ra, Rb, Rc, Rd, Re)
  160. ROUND3(Re, Ra, Rb, Rc, Rd)
  161. ROUND3(Rd, Re, Ra, Rb, Rc)
  162. ROUND3(Rc, Rd, Re, Ra, Rb)
  163. ROUND3(Rb, Rc, Rd, Re, Ra)
  164. SUB.S $1, Rctr
  165. BNE loop3
  166. MOVW $0xCA62C1D6, Rconst
  167. MOVW $4, Rctr
  168. loop4: ROUND4(Ra, Rb, Rc, Rd, Re)
  169. ROUND4(Re, Ra, Rb, Rc, Rd)
  170. ROUND4(Rd, Re, Ra, Rb, Rc)
  171. ROUND4(Rc, Rd, Re, Ra, Rb)
  172. ROUND4(Rb, Rc, Rd, Re, Ra)
  173. SUB.S $1, Rctr
  174. BNE loop4
  175. // Accumulate - restoring registers from SP+4
  176. MOVM.IB (R13), [Rt0,Rt1,Rt2,Rctr,Rw]
  177. ADD Rt0, Ra
  178. ADD Rt1, Rb
  179. ADD Rt2, Rc
  180. ADD Rctr, Rd
  181. ADD Rw, Re
  182. MOVW p_end, Rt0
  183. CMP Rt0, Rdata
  184. BLO loop
  185. // Save final SHA1 accumulator
  186. MOVW dig+0(FP), Rt0
  187. MOVM.IA [Ra,Rb,Rc,Rd,Re], (Rt0)
  188. RET